Flash memory including means of checking memory cell threshold voltages
AssigneeSTMicroelectronics S.r.l.
InventorsPaola Cavaleri, Bruno Leconte, Sebastien Zink, Jean Devin
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Abstract
A FLASH memory erasable by page includes a flash memory array containing a plurality of floating gate transistors arranged in pages, and a checking circuit for checking the threshold voltages of the floating gate transistors. Programmed transistors that have a threshold voltage less than a given threshold are reprogrammed. The checking circuit includes a non-volatile counter formed by at least one row of floating gate transistors, a reading circuit for reading the address of a page to be checked in the counter, and an incrementing circuit for incrementing the counter after a page has been checked.
Claims21
A FLASH memory comprising:
- a memory array comprising a plurality of floating gate transistors, each transistor including a gate connected to a word line, and a row of transistors connected to a same word line defining a page, said memory array being erasable by a page and a set of pages defining a sector;
- and
- a checking circuit for checking a threshold voltage of said plurality of transistors and reprogramming programmed transistors having a threshold voltage less than a desired threshold voltage, said checking circuit comprising
- a non-volatile counter formed by at least one row of transistors in said memory array,
- a reading circuit for reading an address of at least one page to be checked in said counter, and
- an increment circuit for incrementing said counter after checking the at least one page.
A FLASH memory comprising:
- a memory array comprising a plurality of transistors, each transistor including a control terminal connected to a word line, and a row of transistors connected to a same word line defining a page, said memory array being erasable by a page;
- and
- a checking circuit for checking a threshold voltage of said transistors for at least one page and reprogramming programmed transistors in the at least one page having a threshold voltage less than a desired threshold voltage, said checking circuit comprising a non-volatile counter formed by at least one row of transistors in said memory array.
Dependencies are inferred from the claim text.