Power amplifier clipping circuit for minimizing output distortion

A power amplifier clipping circuit comprising:

• an input voltage level dividing unit which generates a first dividing voltage and a second dividing voltage that divide an interval to which the level of an input voltage belongs;
• a first bias transistor and a second bias transistor which are connected to a positive internal power source voltage, the first and second bias transistors forming a current mirror and providing a bias voltage to a predetermined first differential amplifying unit;
• a third bias transistor which is connected to the first bias transistor and provides a bias voltage to the first differential amplifying unit;
• a first constant current source which is connected to the third bias transistor and a negative internal power source voltage, and controls the third bias transistor;
• the first differential amplifying unit which receives the first dividing voltage and the input voltage, and if the level of the input voltage is between the first dividing voltage and a predetermined first clipping voltage, generates a first output signal, while if the level of the input voltage exceeds the first dividing voltage, generates a second output signal;
• a fourth bias transistor and a fifth bias transistor which are connected to a negative internal power source voltage, the fourth and fifth bias transistors forming a current mirror, and providing a bias voltage to a predetermined second differential amplifying unit;
• a sixth bias transistor which is connected to the fourth bias transistor and provides a bias voltage to the second differential amplifying unit;
• a second constant current source which is connected to the sixth bias transistor and a positive internal power source voltage, and controls the sixth bias transistor;
• the second differential amplifying unit which receives the second dividing voltage and the input voltage, and if the level of the input voltage is between a predetermined second clipping voltage and the second dividing voltage, generates a third output signal, while if the level of the input voltage exceeds the second dividing voltage, generates a fourth output signal;
• a first output voltage control unit which is connected between the negative internal power source voltage and an output node in which an input resistor that is serially connected to the input voltage is connected to a power amplifier, and in response to the first and second output signals, lowers the level of the input voltage and provides the input voltage to the power amplifier;
• and
• a second output voltage control unit which is connected between the positive internal power source voltage and the output node, and in response to the third and the fourth output signal, raises the level of the input voltage and provides the input voltage to the power amplifier.