SOI MOSFET having amorphized source drain and method of fabrication

An integrated circuit formed in semiconductor-on-insulator format, comprising:

• a layer of semiconductor material disposed on an insulating layer, the insulating layer disposed on a substrate;
• a first MOSFET, including:
• a first source and a first drain formed in the layer of semiconductor material and a first body disposed between the first source and the first drain, the first source and the first drain each having a crystalline portion adjacent the first body;
• and
• a first gate electrode disposed over the first body region and separated from the layer of semiconductor material by a first gate dielectric;
• a second MOSFET, including:
• a second source and a second drain formed in the layer of semiconductor material and a second body disposed between the second source and the second drain, the second source and the second drain each having a crystalline portion adjacent the second body;
• and
• a second gate electrode disposed over the second body region and separated from the layer of semiconductor material by a second gate dielectric;
• wherein one of the second source and the second drain is disposed adjacent one of the first source and the first drain;
• and
• an amorphous region formed in the layer of semiconductor material and extending from an upper surface of the layer of semiconductor material to the insulating layer, and the amorphous region being formed between the crystalline portion of the one of the second source and the second drain and the crystalline portion of the one of the first source and the first drain;
• and
• wherein the amorphous region contains a PIN junction formed between the one of the second source and the second drain and the one of the first source and the first drain.

An integrated circuit formed in semiconductor-on-insulator format, comprising:

• a layer of semiconductor material disposed on an insulating layer, the insulating layer disposed on a substrate;
• a first MOSFET, including:
• a first source and a first drain formed in the layer of semiconductor material and a first body disposed between the first source and the first drain, the first source and the first drain each having a crystalline portion adjacent the first body;
• and
• a first gate electrode disposed over the first body region and separated from the layer of semiconductor material by a first gate dielectric;
• a second MOSFET, including:
• a second source and a second drain formed in the layer of semiconductor material and a second body disposed between the second source and the second drain, the second source and the second drain each having a crystalline portion adjacent the second body;
• and
• a second gate electrode disposed over the second body region and separated from the layer of semiconductor material by a second gate dielectric;
• wherein one of the second source and the second drain is disposed adjacent one of the first source and the first drain;
• and
• an amorphous region formed in the layer of semiconductor material and extending from an upper surface of the layer of semiconductor material to the insulating layer, and the amorphous region being formed between the crystalline portion of the one of the second source and the second drain and the crystalline portion of the one of the first source and the first drain;
• and
• wherein the amorphous region contains dopant species used to form the one of the second source and the second drain and the one of the first source and the first drain.