TFT with a negative substrate bias that decreases in time

Abstract

A voltage applying section (32) is connected to a silicon substrate (1). Emission of radiation to a semiconductor device causes a large number of holes to accumulate within a BOX layer (2) in the vicinity of the interface with respect to a silicon layer (3). The amount of accumulation of holes increases with a lapse of time. A voltage applying section (32) applies a negative voltage which decreases with the lapse of time to the silicon substrate (1) in order to cancel out a positive electric field resulting from the accumulated holes. The voltage applying section (32) includes a time counter (30) for detecting the lapse of time and a voltage generating section (31) connected to the silicon substrate (1) for generating a negative voltage (V1) which decreases in proportion to the lapse of time based on the result of detection (time T) carried out by the time counter (30). Consequently, a semiconductor device capable of suppressing occurrence of total dose effects is obtained.

Dependencies are inferred from the claim text.