Register setting method and semiconductor device
AssigneeFujitsu Limited
InventorTeruaki Maeda
Life of this patent
Estimating the term…
Abstract
A register setting method which facilitates writing of change information into a register for storing operation condition information that defines the operation of a device. The method includes the steps of storing first operation condition information in a first register, storing second operation condition information in a second register, changing the first operation condition information, and when the first operation condition information is changed, changing the second operation condition information to changed first operation condition information in accordance with change information for changing the first operation condition information.
Claims14
A semiconductor device having a plurality of operation modes and adapted to operate in accordance with operation condition information which defines each operation mode, the semiconductor device comprising:
- a first register for storing first operation condition information;
- a second register connected to the first register for storing second operation condition information;
- and
- a device control circuit connected to the first register for controlling the operation of the semiconductor device in accordance with the first operation condition information or the second operation condition information,
- wherein when the first operation condition is changed, the second register receives a set signal including change information for changing the first operation condition information, and changes the second operation condition information to changed first operation condition information in accordance with the change information.
A semiconductor device having a plurality of operation modes and adapted to operate in accordance with operation condition information which defines each operation mode, the device comprising:
- a first register for storing first operation condition information;
- a change detector connected to the first register for detecting a change in the first operation condition information stored in the first register to generate a detection signal in accordance with the detected change;
- a second register connected to the first register and the change detector for storing second operation condition information in response to the detection signal;
- and
- a device control circuit connected to the first register for controlling the operation of the semiconductor device in accordance with the first operation condition information or the second operation condition information,
- wherein the second register receives a second register change signal including change information for changing the first operation condition information, and changes the second operation condition information to changed first operation condition information in accordance with the change information in response to the detection signal.
A semiconductor device having a plurality of operation modes and adapted to operate in accordance with operation condition information which defines each operation mode, the device comprising:
- a first register including a volatile memory for storing first operation condition information;
- a second register connected to the first register and including a non-volatile memory for storing second operation condition information;
- and
- a device control circuit connected to the first register and the second register for controlling the operation of the semiconductor device in accordance with the first operation condition information or the second operation condition information,
- wherein when the second operation condition information is changed, the second register changes the first operation condition information in the first register to changed second operation condition information substantially at the same time the second operation condition information is changed, in accordance with change information for changing the second operation condition information.
Dependencies are inferred from the claim text.