Stress controlled dielectric integrated circuit fabrication

A method of making an integrated circuit comprising the steps of:

• providing a substrate having a principal surface;
• forming a barrier layer in the substrate parallel to the principal surface;
• forming semiconductor devices on the principal surface within a device layer above the barrier layer, a plurality of semiconductor devices overlying the barrier layer;
• after forming the semiconductor devices, depositing a stress-controlled insulating membrane over the semiconductor devices;
• thinning the substrate by removing from a backside of the substrate opposite the principal surface at least a portion of the substrate below the barrier layer and underlying the device layer;
• and
• attaching an annular support ring to an edge portion of the substrate.

A method of making an integrated circuit comprising the steps of:

• providing a substrate having a principal surface;
• forming a barrier layer in the substrate parallel to the principal surface by forming a heavily doped boron layer and epitaxially growing a SiGe layer of less then 25% Ge on either side of the boron layer;
• forming semiconductor devices on the principal surface within a device layer above the barrier layer, a plurality of semiconductor devices overlying the barrier layer;
• after forming the semiconductor devices, depositing a stress-controlled insulating membrane over the semiconductor devices;
• and
• thinning the substrate by removing from a backside of the substrate opposite the principal surface at least a portion of the substrate below the barrier layer and underlying the device layer.

A method of making an integrated circuit comprising the steps of:

• providing a substrate having a principal surface, wherein the substrate comprises polycrystalline silicon;
• forming a barrier layer in the substrate parallel to the principal surface;
• forming semiconductor devices on the principal surface within a device layer above the barrier layer, a plurality of semiconductor devices overlying the barrier layer;
• after forming the semiconductor devices, depositing a stress-controlled insulating membrane over the semiconductor devices;
• thinning the substrate by removing from a backside of the substrate opposite the principal surface at least a portion of the substrate below the barrier layer and underlying the device layer.

A method of making an integrated circuit comprising the steps of:

• providing a substrate having a principal surface, wherein the substrate comprises an amorphous material;
• forming a barrier layer in the substrate parallel to the principal surface;
• forming semiconductor devices on the principal surface within a device layer above the barrier layer, a plurality of semiconductor devices overlying the barrier layer;
• after forming the semiconductor devices, depositing a stress-controlled insulating membrane over the semiconductor devices;
• and
• thinning the substrate by removing from a backside of the substrate opposite the principal surface at least a portion of the substrate below the barrier layer and underlying the device layer.

A method of making an integrated circuit comprising the steps of:

• providing a substrate having a principal surface;
• forming a barrier layer in the substrate parallel to the principal surface;
• forming semiconductor devices on the principal surface within a device layer above the barrier layer, a plurality of semiconductor devices overlying the barrier layer;
• after forming the semiconductor devices, depositing a stress-controlled insulating membrane over the semiconductor devices;
• thinning the substrate by removing from a backside of the substrate opposite the principal surface at least a portion of the substrate below the barrier layer and underlying the device layer;
• forming an additional thickness of stress-controlled insulating material over the membrane;
• and
• forming a plurality of recesses in the additional thickness, wherein a depth of the recesses is about 75% of the additional thickness and wherein a width of the recesses is about two to three times the depth of the recesses.

A method of making an integrated circuit comprising the steps of:

• providing a substrate having a principal surface;
• forming a barrier layer in the substrate parallel to the principal surface;
• forming semiconductor devices on the principal surface within a device layer above the barrier layer, a plurality of semiconductor devices overlying the barrier layer;
• after forming the semiconductor devices, depositing a stress-controlled insulating membrane over the semiconductor devices, wherein said insulating membrane is deposited with a material selected from the group consisting of silicon dioxide and silicon nitride and has a surface stress level of less than 8×108 dynes/cm2 ;
• and
• thinning the substrate by removing from a backside of the substrate opposite the principal surface at least a portion of the substrate below the barrier layer and underlying the device layer.

A method of making an integrated circuit comprising the steps of:

• providing a substrate having a principal surface;
• forming a barrier layer in the substrate parallel to the principal surface;
• forming semiconductor devices on the principal surface within a device layer above the barrier layer, a plurality of semiconductor devices overlying the barrier layer;
• after forming the semiconductor devices, depositing a stress-controlled insulating membrane over the semiconductor devices;
• and
• thinning the substrate by removing from a backside of the substrate opposite the principal surface at least a portion of the substrate below the barrier layer and underlying the device layer;
• wherein structural integrity of a substantial portion of the integrated circuit is derived primarily from the stress-controlled insulated membrane.

A method of making an integrated circuit comprising the steps of:

• providing a substrate having a principal surface;
• forming a barrier layer in the substrate parallel to the principal surface;
• forming semiconductor devices on the principal surface within a device layer above the barrier layer, a plurality of semiconductor devices overlying the barrier layer;
• after forming the semiconductor devices, depositing a stress-controlled insulating membrane over the semiconductor devices, wherein a portion of the substrate below the barrier layer and underlying the device layer is removable from a backside of the substrate opposite the principal surface, while retaining structural integrity of the integrated circuit.

A method of making an integrated circuit comprising the steps of:

• providing a substrate having a principal surface;
• forming a barrier layer in the substrate parallel to the principal surface;
• forming semiconductor devices on the principal surface wherein a device layer above the barrier layer, a plurality of semiconductor devices overlying the barrier layer;
• after forming the semiconductor devices, depositing a stress-controlled insulating membrane over the semiconductor devices;
• and
• thinning the substrate by removing at least a portion of the substrate from a backside of the substrate opposite the principal surface below the barrier layer and underlying the device layer.

A method of making an integrated circuit comprising the steps of:

• providing a substrate having a principal surface;
• forming a barrier layer in the substrate parallel to the principal surface;
• forming semiconductor devices on the principal surface within a device layer above the barrier layer, a plurality of semiconductor devices overlying the barrier layer;
• after forming the semiconductor devices, depositing a stress-controlled insulating membrane over the semiconductor devices, wherein a portion of the substrate below the barrier layer and underlying the device layer is removable from a backside of the substrate opposite the principal surface.

A method of making an integrated circuit comprising the steps of:

• providing a substrate having a principal surface;
• forming a barrier layer in the substrate parallel to the principal surface;
• forming semiconductor devices on the principal surface within a device layer above the barrier layer, a plurality of semiconductor devices overlying the barrier layer;
• after forming the semiconductor devices, depositing a stress-controlled insulating membrane over the semiconductor devices.

A method of making an integrated circuit comprising the steps of:

• providing a substrate having a principal surface;
• forming a barrier layer in the substrate parallel to the principal surface;
• forming an epitaxial layer above the barrier layer on the principal surface;
• forming semiconductor devices in the epitaxial layer;
• after forming the semiconductor devices, depositing a stress-controlled insulating membrane over the semiconductor devices, wherein said insulating membrane has a surface stress level of less than 8×108 dynes/cm2;
• and
• thinning the substrate by removing from a backside of the substrate opposite the principal surface at least a portion of the substrate below the barrier layer and underlying the epitaxial layer.