Wafer level packaging of micro electromechanical device
AssigneeLightuning Tech. Inc.
InventorsBruce C. S. Chou, Hsien-Ming Wu, Ping-Chin Sun
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Abstract
The present invention provides a wafer level package of micro electromechanical devices. The wafer level package of the present invention comprises a wafer having a plurality of micro electromechanical devices and a package wafer of the same size. A plurality of conductor plugs penetrate through the upper and lower surfaces of the package wafer. Solder bumps are formed on the conductor plugs to be adhered to predetermined solder bumps on the micro electromechanical device wafer so as to form a package device. The wafer level package of the present invention can prevent micro electromechanical devices from damage during the packaging procedure.
Claims13
A wafer level package of micro electromechanical devices, comprising:
- a micro electromechanical device wafer with a plurality of micro electromechanical devices fabricated therein, said micro electromechanical device wafer being formed by arranging many chip units, a plurality of first solder bumps corresponding to I/O bonding pads of said chip units being disposed on a surface of said wafer, a guard ring of said first solder bumps being disposed at an outer periphery of each of said chip units to enclose the whole internal micro electromechanical devices and the I/O bonding pads;
- and
- a package wafer base of the same size as that of said micro electromechanical device wafer, a plurality of conductor plugs penetrating through upper and lower surfaces of said package wafer base, second solder bumps being disposed at two ends of said conductor plugs, a guard ring of said second solder bumps being fabricated on the upper surface of said package wafer base, said micro electromechanical device wafer being installed on said package wafer base by soldering said first solder bumps and said first guard ring with said second solder bumps and said second guard ring.
A wafer level package of micro electromechanical devices, comprising:
- a substrate formed by arranging many chip units, a plurality of first solder bumps being disposed on a surface of said substrate, a guard ring of said first solder bumps being disposed at an outer periphery of each of said chip units;
- and
- a package wafer base of the same size as that of said substrate, said package wafer base having a plurality of micro electromechanical devices fabricated therein, a plurality of conductor plugs penetrating through upper and lower surfaces of said package wafer base, second solder bumps being disposed at two ends of said conductor plugs, a guard ring of said second solder bumps being fabricated on the upper surface of said package wafer base, said substrate being installed on said package wafer base by soldering said first solder bumps and said first guard ring with said second solder bumps and said second guard ring.
Dependencies are inferred from the claim text.