Double spacer FinFET formation
AssigneeAdvanced Micro Devices, Inc.
InventorsMatthew S. Buynoski, Judy Xilin An, Haihong Wang, Bin Yu
Life of this patent
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Abstract
A method for forming a group of structures in a semiconductor device includes forming a conductive layer on a substrate, where the conductive layer includes a conductive material, and forming an oxide layer over the conductive layer. The method further includes etching at least one opening in the oxide layer, filling the at least one opening with the conductive material, etching the conductive material to form spacers along sidewalls of the at least one opening, and removing the oxide layer and a portion of the conductive layer to form the group of structures.
Claims17
A method for forming fins in a FinFET, comprising:
- forming an oxide layer on a silicon on insulator (SOI) wafer, the SOI wafer including a silicon layer, an insulator layer, and a substrate;
- creating at least one opening in the oxide layer;
- growing silicon in the at least one opening;
- etching the silicon to form spacers, the spacers being adjacent sidewalls of the opening;
- and
- removing the oxide layer and the silicon in the SOI wafer located below the oxide layer to form the fins.
A method of manufacturing a semiconductor device, comprising:
- depositing an oxide layer over a conductive layer, the conductive layer including a conductive material;
- etching at least one opening in the oxide layer, the at least one opening having two sidewalls;
- filling the at least one opening with the conductive material, the filling including growing the conductive material via a selective epitaxial growth to fill the at least one opening;
- forming spacers adjacent the two sidewalls of the at least one opening;
- removing the oxide layer and a portion of the conductive layer to form fin structures;
- forming a source region and a drain region;
- depositing a gate material over the fin structures;
- and
- patterning and etching the gate material to form at least one gate electrode.
A method for forming a plurality of structures on a wafer including a conductive layer that includes conductive material, comprising:
- forming an oxide layer over the conductive layer;
- etching at least one opening in the oxide layer;
- growing the conductive material in the at least one opening;
- etching the conductive material to form spacers along sidewalls of the at least one opening;
- and
- removing the oxide layer and a portion of the conductive layer to form the plurality of structures.
Dependencies are inferred from the claim text.