Successive approximation calibration apparatus, system, and method for dynamic range extender
AssigneeCirrus Logic, Inc.
InventorNadi R. Itani
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AssigneeCirrus Logic, Inc.
InventorNadi R. Itani
Estimating the term…
A gain characteristic correctable dynamic range enhancement system (DRES) receives input signals from an imager device connected to a correlated double sampling (CDS) circuit for receiving the video signal from the CCD imaging device. The dynamic range enhancement system includes a variable gain amplifier (VGA), and a limited bit-width analog-to-digital converter (ADC) which digitizes the analog signal received from the VGA. The output of the ADC is provided to an initial bit range position of a wider bit-width shifter connected to the output of the ADC. The DRES system correctably extends the dynamic range of the imager device, subject to offsets providing linearity corrections at predetermined trip points, subject to determined offset values, to ensure that there are no discontinuities in the system transfer function.
A method of extending the dynamic range of an electrical system including a variable gain amplifier connected to an analog-to-digital converter producing an output signal of predetermined bit-width, said method comprising:
A method of extending the dynamic range of an electrical system including a variable gain amplifier connected to an analog-to-digital converter producing an output signal of predetermined bit-width, said method comprising:
A method of extending the dynamic range of an electrical system including a variable gain amplifier connected to an analog-to-digital converter producing an output signal of predetermined bit-width, said method comprising:
A processing system for an imager device comprising:
A method of correcting the extension of the dynamic range of an imaging system having a correlated double sampling system, a variable gain amplifier circuit connected to said correlated double sampling system, an analog-to-digital converter connected to said variable gain amplifier circuit, and a shifter containing a predetermined number of bits greater than the digital output width of said analog-to-digital converter, said shifter connected to said analog-to-digital converter for receiving the output bit set of said analog-to-digital converter into predetermined locations in said shifter, including:
Dependencies are inferred from the claim text.