Bidirectional voltage regulator sourcing and sinking current for line termination

A voltage regulator for providing a bidirectional current and a regulated voltage to a load, the voltage regulator comprising:

• means for providing a regulated output voltage that is approximately half of an input voltage, when the output voltage is within a voltage range set by a first predetermined level and a second predetermined level, and for providing current to the load and receiving current from the load, as needed by the load;
• means for providing additional current to the load and for maintaining the output voltage at the first predetermined level, if the regulated output voltage falls to the first predetermined level;
• and
• means for receiving additional current from the load and maintaining the output voltage at the second predetermined level if the regulated output voltage rises to the second predetermined level.

A voltage regulator for providing a bidirectional current and a regulated voltage to a load, the voltage regulator comprising:

• a capacitor having a first node and a second node;
• first and second switches, each having a control input that operates the switch, the first switch connected between a node with an input voltage and a first node of the capacitor, the second switch connected between a node carrying the regulated output voltage and the second node of the capacitor;
• third and fourth switches, each having a control input that operates the switch, the third switch connected between the output voltage node and the first node of the capacitor, the fourth switch connected between the second node of the capacitor and ground;
• first and second drivers, the first and second drivers each having inputs for receiving an external clock signal, the external clock signal-having a first phase and a second phase, the first driver connected to the control input of the first switch and operative to close the first switch on the first phase of the clock signal, the second driver connected to the control input of the second switch and operative to close the second switch on the first phase of the clock signal;
• third and fourth drivers, the third and fourth drivers each having inputs for receiving the external clock signal, the third driver connected to the control input of the third switch and operative to close the third switch on the second phase of the clock signal, the fourth driver connected to the control input of the fourth switch and operative to close the fourth switch on the second phase of the clock signal;
• wherein the first, second, third and fourth drivers, the first, second, third and fourth switches and the capacitor are operative to regulate the output voltage at one-half of the input voltage, when the output voltage is within a range set by a first predetermined voltage and a second predetermined voltage;
• first transistor having a source and drain, a conduction channel formed therebetween being connected between the input voltage node and the output voltage node, and a gate input;
• second transistor having a source and drain, a conduction channel formed therebetween being connected between the output voltage node and ground, and a gate input;
• first operational amplifier having an input for receiving the first predetermined voltage, an input connected to the output voltage node and output connected to the gate of the first transistor, the first operational amplifier and first transistor for maintaining the output voltage at the first predetermined voltage when the output voltage falls to the first predetermined voltage;
• second operation amplifier having an input for receiving the second predetermined voltage, an input connected to the output voltage node and output connected to the gate of the second transistor, the second operational amplifier and second transistor for maintaining the output voltage at the second predetermined voltage when the output voltage rises to the second predetermined voltage.