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AssigneeSun Microsystems, Inc.
InventorJames M. Avery
Estimating the term…
PCI load/store operations and DMA operations are implemented via work queue pairs in a message-passing, queue-oriented bus architecture. PCI address space is divided into segments and, each segment, in turn, is divided into regions. A separate work queue is assigned to each segment. A first portion of a PCI address is matched against the address ranges represented by the segments and used to select a memory segment and its corresponding work queue. An entry in the work queue holds a second portion of the PCI address which specifies a region within the selected segment that is assigned to a specific PCI device. In one embodiment, PIO load/store operations are implemented by selecting a work queue assigned to PIO operations and creating a work queue entry with the PCI address of a register on a PCI device and a pointer to the PIO data. The work queue entry is sent to a PCI bridge where the PCI address is extracted and used to program the appropriate device register with the data using the data pointer. DMA transfers are also implemented by selecting a work queue by means comparing a portion of the PCI address generated by the PCI device to an address range table and selecting a work queue that services the address range. A work queue entry is created with the remainder of the PCI address and a pointer to the DMA data. An RDMA operation is used to perform the DMA transfer. The page and region data is used in connection with a translation protection table in the host channel adapter to access physical memory and perform the DMA transfer.
Apparatus for use in a computer system having a memory, the apparatus connecting a PCI device that accesses a PCI memory address space in the memory by means of a PCI address to a message passing queue-oriented bus architecture having work queues, and comprising:
A method for use in a computer system having a memory, the method connecting a PCI device that accesses a PCI memory address space in the memory by means of a PCI address to a message passing queue-oriented bus architecture having work queues, and comprising:
A computer program product for use in a computer system having a memory, the computer program product embodying code for connecting a PCI device that accesses a PCI memory address space in the memory by means of a PCI address to a message passing queue-oriented bus architecture having work queues, and comprising a computer usable medium having computer readable program code thereon, including:
A computer data signal for use in a computer system having a memory, the computer data signal embodying code for connecting a PCI device that accesses a PCI memory address space in the memory by means of a PCI address to a message passing queue-oriented bus architecture having work queues, and comprising:
Dependencies are inferred from the claim text.