US 6,696,869 B1 · Buffer circuit for a high-bandwidth analog to digital converter

Abstract

The present invention relates to improved ADC buffers and AFEs for high frequency applications, such as VDSL. The present invention can also be programmably configured for other xDSL applications. In this regard, a buffer circuit for a high-bandwidth analog-to-digital converter (ADC) includes a first unity-gain buffer configured to receive an analog input signal. The first unity-gain buffer includes a MOSFET differential amplifier with a current mirror load and a transient-reduction network electrically interconnected with the MOSFET differential amplifier and configured to reduce transient energy emitted by the ADC. The buffer circuit also includes a second unity-gain buffer cascaded to the first unity-gain buffer and configured to provide the analog input signal from the first unity-gain buffer to the ADC.

Claims15

Dependent claims

A buffer circuit for a high-bandwidth analog-to-digital converter (ADC), the buffer circuit comprising:

a first unity-gain buffer configured to receive an analog input signal, the first unity-gain buffer comprising:
a MOSFET differential amplifier with a current mirror load;
and
a transient-reduction network electrically interconnected with the MOSFET differential amplifier and configured to reduce transient energy emitted by the ADC;
and
a second unity-gain buffer cascaded to the first unity-gain buffer and configured to provide the analog input signal from the first unity-gain buffer to the ADC, wherein the second unity-gain buffer consumes more power than the first unity-gain buffer.

3 more elements

Dependencies are inferred from the claim text.

Buffer circuit for a high-bandwidth analog to digital converter

Life of this patent

Buffer circuit for a high-bandwidth analog to digital converter

Life of this patent

Abstract

Claims15