Differential amplifiers with increased input ranges

A circuit comprising:

• a differential amplifier having a pair of load transistors connected to a pair of driver transistors at a first output node and a second output node, and a current source transistor connected to a common node shared by sources of the pair of driver transistors;
• a current regulator connected to the common node and a gate of the current source transistor;
• a first stack of transistors connected between the first output node and a first supply node;
• and
• a second stack of transistors connected between the second output node and the first supply node.

A memory device comprising:

• a plurality of memory cells;
• and
• an address path, a data path, and a control path, all paths connected to the memory cells, wherein at least one of the paths includes an input buffer, the input buffer including:
• a differential amplifier including a pair of driver transistors for receiving input signals and including output nodes;
• a current regulator connected to the differential amplifier for regulating a current of a first current path of the differential amplifier based on first signal levels of the input signals, the first current path being located between the output nodes and a supply node;
• and
• an input enhancement unit connected to the differential amplifier and the current regulator for steering a majority of the current from the first current path to a second current path based on second signal levels of the input signals, the second current path being different from the first current path and being located between the output nodes and the supply node.

A memory device comprising:

• a plurality of memory cells;
• and
• an address path, a data path, and a control path, all paths connected to the memory cells,
• wherein at least one of the paths includes an input buffer, the input buffer including:
• a differential amplifier having a pair of load transistors connected to a pair of driver transistors at a first output node and a second output node, and a current source transistor connected to a common node shared by sources of the pair of driver transistors;
• a current regulator connected to the common node and a gate of the current source transistor;
• a first stack of transistors connected between the first output node and a first supply node;
• and
• a second stack of transistors connected between the second output node and the first supply node.

A system comprising:

• a processor;
• and
• a memory device connected to the processor, the memory device including:
• a plurality of memory cells;
• and
• an address path, a data path, and a control path, all paths connected to the memory cells, wherein at least one of the paths includes an input buffer, the input buffer including:
• a differential amplifier including a pair of driver transistors for receiving input signals and including output nodes;
• a current regulator connected to the differential amplifier for regulating a current of a first current path of the differential amplifier based on first signal levels of the input signals, the first current path being located between the output nodes and a supply node;
• and
• an input enhancement unit connected to the differential amplifier and the current regulator for steering a majority of the current from the first current path to a second current path based on second signal levels of the input signals, the second current path being different from the first current path and being located between the output nodes and the supply node.

A system comprising:

• a processor;
• and
• a memory device connected to the processor, the memory device including:
• a plurality of memory cells;
• and
• an address path, a data path, and a control path, all paths connected to the memory cells, wherein at least one of the paths includes an input buffer, the input buffer including:
• a differential amplifier having a pair of load transistors connected to a pair of driver transistors at a first output node and a second output nodes, and a current source transistor connected to a common node shared by sources of the pair of driver transistors;
• a current regulator connected to the common node and a gate of the current source transistor;
• a first stack of transistors connected between the first output node and a first supply node;
• and
• a second stack of transistors connected between the second output node and the first supply node.

A method of operating an amplifying circuit, the method comprising:

• receiving input signals at a differential amplifier;
• regulating a current of a first current path of the differential amplifier based on first signal levels of the input signals, the first current path being located between output nodes of the differential amplifier and a supply node;
• and
• steering the current from the first current path to a second current path based on second signal levels of the input signals, the second current path being different from the first current path and being located between the output nodes and the supply node.

A method of comprising:

• receiving input signals at an amplifying circuit;
• generating output signals based on a first current path when the input signals have first signal levels, the first current path being located between output nodes of the amplifying circuit and a supply node;
• and
• generating the output signals based on a second current path when the input signals have second signal levels, the second current path being different from the first current path and being located between the output nodes and the supply node.

A method comprising:

• receiving input signals having first signal levels at a pair of driver transistors;
• receiving the input signals at a pair of input transistors connected in parallel with the pair of driver transistors;
• regulating a current of a first current path controlled by the pair of driver transistors, the first current path being located between drains of the pair of driver transistors and a supply node wherein current in the first current path passes from the drains of the pair of driver transistors to the supply node through the pair of driver transistors;
• and
• steering current from the first current path to a second current path controlled by the pair of input transistors when the input signals change to second signal levels, the second current path being different from the first current path, wherein current in the second current path passes from the drains of the pair of driver transistors to the supply node through the pair of input transistors.

A circuit comprising:

• a differential amplifier having a first differential input node and a second amplifier input node for receiving differential input signals, and having an amplifier current source;
• and
• a current regulator connected to the differential amplifier, the current regulator including:
• a pair of input transistors having shared sources and shared drains receiving the differential input signals to regulate a current of the differential amplifier;
• and
• a regulator current source connected to the shared drains, wherein the shared drains connect to a control node of the amplifier current source.