Thyristor-based device that inhibits undesirable conductive channel formation

A memory cell comprising:

• a pass device having first and second source/drain regions separated by a channel region and a pass gate arranged to capacitively couple to the channel region via a gate dielectric material, the pass gate being configured and arranged to switch the channel region between a blocking state and a conducting state for current passing between the first and second source/drain regions in response to a voltage being applied to the pass gate;
• a bit line coupled to the first source/drain region;
• a first word line coupled to the pass gate;
• a thyristor comprising
• a plurality of thyristor regions including a first base region adjacent to a first emitter region and a second base region adjacent to a second emitter region, the first and second base regions being connected to one another and the first emitter region being connected to the second source drain region of the pass device, and
• a thyristor gate electrode configured and arranged to capacitively couple a signal to at least the first base region via a gate dielectric material and to switch the thyristor between a blocking state and a conducting state for passing current between the first and second emitter regions, the thyristor gate electrode exhibiting a gate workfunction that inhibits parasitic MOS-inversion channel formation in the thyristor when the thyristor gate electrode is controlled for controlling current passing and blocking in the plurality of thyristor regions;
• and
• a second word line coupled to the thyristor gate electrode and configured and arranged to apply a voltage to the thyristor gate electrode for capacitively coupling said signal.