Optimization of n-base typed arithmetic expressions

An apparatus for arithmetic expression optimization, comprising:

• at least one memory having program instructions;
• and
• at least one processor configured to use the program instructions to:
• receive a first instruction defined for a first processor having a first base, said instruction including an operator and at least one operand;
• and
• indicate whether said at least one operand has potential overflow based upon whether said at least one operand carries overflow and whether said operator is sensitive to overflow.

A smart card having a microcontroller embedded therein, the smart card comprising a virtual machine being executed by a microcontroller, the virtual machine executing a software application comprising of a plurality of previously optimized instructions, the instructions optimized by a method comprising:

• receiving a first instruction defined for a first processor having a first base, said instruction including an operator and at least one operand;
• converting said first instruction to a second instruction optimized for a second processor having a second base when said at least one operand does not carry potential overflow beyond said second base or when said operator is insensitive to overflow, said second base smaller than said first base;
• and
• the virtual machine comprising means for receiving optimized instructions, the optimized instructions being previously optimized for execution on a resource-constrained device and means for executing said instructions.