Method for testing a memory array

A method of loading a memory device with a test bit pattern, the method comprising:

• loading a data register with a first test bit pattern having a plurality of ones and at least one zero;
• storing the first test bit pattern in the memory device;
• generating a new test bit pattern by pushing into the data register an additional predetermined pattern of bits comprising at least one bit and shifting the first test bit pattern by the at least one bit within the data register;
• and
• storing the new test bit pattern in the memory device.

A method of loading a memory device having a plurality of memory cells organized by rows and columns with a test bit pattern, the method comprising:

• generating a first test bit pattern by loading a data register with two rows of bit information;
• storing the first test bit pattern in two rows of the memory device;
• generating a new test bit pattern for two additional rows by shifting the first test bit pattern by at least two bits within the data register, wherein the step of shifting comprises pushing a predetermined two-bit pattern into the data register;
• and
• storing the new test bit pattern in the two additional rows.