Apparatus and method for storing information during a test program
AssigneeAgilent Technologies, Inc.
InventorsAlan S Krech, Jr., John M Freeseman
Life of this patent
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Abstract
An apparatus for automatically accumulating and storing information has a destination memory and an indexing circuit. The indexing circuit has an input port, a selector having a selector output, a register holding a value from the selector output and presenting the selector output value at a register output, and an accumulator accepting a value from the input port and a value from the register output and presenting a sum of the input port and register output values at an accumulator output. The selector receives the input port value from the input port, the accumulator output, and the value from the register output, the selector output being based upon a programmable selection code. The register output is connected to the destination memory .
Claims20
An apparatus for automatically accumulating and storing information comprising:
- a destination memory, and
- an indexing circuit comprising
- an input port,
- a selector having a selector output,
- a register holding a value from said selector output and presenting said value at a register output,
- an accumulator accepting a value from said input port and a value from said register output and presenting a sum of said values at an accumulator output,
- said selector receiving said value from said input port, said accumulator output, and said value from said register output, said selector output being based upon a programmable selection code,
- said register output being connected to said destination memory.
A method for storing information comprising the steps of:
- fetching a program instruction word, said program instruction word comprising a first segment and a second segment,
- executing said first segment,
- executing said second segment, comprising the steps of presenting a value to a programmable indexing circuit, presenting a selection code to said indexing circuit, and accessing a destination memory with an output of said indexing circuit.
Dependencies are inferred from the claim text.