Analog storage semiconductor memory that uses plural write voltages and plural read voltages having different voltage levels

Abstract

An analog storage flash memory by which sufficient write accuracy can be obtained even when the write speed of the memory cell transistor disperses due to manufacturing dispersion or other reasons. A read voltage adjustment circuit outputs the read voltage generated by a read voltage generation circuit as is, or drops and outputs the read voltage. A write voltage adjustment circuit outputs the write voltage generated by a write voltage generation circuit as is, or drops and outputs the write voltage. A write control circuit repeats the write operation at the write voltage Vw until the memory cell transistor turns OFF at the read voltage Vr−ΔVr in the first write cycle, and repeats the write operation at the write voltage Vw−ΔVw until the memory transistor turns OFF at the read voltage Vr in the second write cycle.

Dependencies are inferred from the claim text.