Fault condition protection

#The present invention relates to an off-line switched mode control system with fault condition protection.

#Quantum leaps in electronic technology have led to the development of “smart” electrical and electronic products. Each of these products requires a steady and clean source of power from a power supply. One power supply technology called switched mode power supply technology operates at a high frequency to achieve small size and high efficiency. In such a switching power supply, an integrated circuit (IC) regulator is connected in series with the primary winding of a transformer to a rectified and filtered alternating current (AC) power line. The energy is transferred from the primary winding through an output secondary winding to the power supply output in a manner controlled by the IC regulator so as to provide a clean and constant output voltage. Additionally, a third winding called a feedback or bias winding may be used to provide a feedback signal and power to the IC regulator.

#The voltage on the feedback winding tracks the output voltage present on the secondary winding. Thus, when a short occurs on the output of the secondary winding, the voltage on the feedback winding also goes low. Further, in the event of a short circuit condition, an overload condition on the output secondary winding or an open loop condition on the feedback winding, the regulator circuit responds to such conditions by delivering maximum power over a period of time. In such cases, the regulator circuit detects that the power supply is short circuited, overloaded at the output or has encountered an open loop condition. In any of these fault conditions, the regulator circuit goes into a mode called “auto-restart.” In the auto-restart mode, the regulator circuit tries to start the power supply periodically by delivering full power for a period of time (greater than needed for start up) and turns off the power supply for another period of time that is approximately four to ten times longer. As long as the fault condition is present, the regulator circuit remains in this auto-restart mode limiting the average output power to a safe, low value. When the fault is removed, auto-restart enables the power supply to start-up automatically.

#FIG. 1 is a schematic illustration of a fault condition protection device of the invention.

#FIG. 2 is a plot illustrating the operation of the device of FIG. 1.

#FIG. 3 is a schematic illustration of a second embodiment of the fault condition protection device.

#Referring now to FIG. 1, a fault-protection circuit 200 is shown. The circuit 200 has a primary oscillator 111 which is connected to a counter 202. The counter 202 can be reset by a feedback signal which clears registers Q8-Q13 of counter 202. The feedback signal is explained in more detail below.

#An inverter 204 receives the 13-th bit output of counter 202. The output of inverter 204 is provided to an AND-gate 206 whose other input is connected to a switching signal. The switching signal is derived from the oscillator 111 output and the feedback signal. This switching signal cycles periodically when the power supply operates normally. The switching signal is idled when the power supply encounters a fault condition. The output of AND-gate 206 in turn is provided to the gate of a switching transistor 208. Counter 202 eventually causes an AND-gate 206 to shut-off switching transistor 208 and to perform auto-restart.

#Turning now to oscillator 111, a current source 122 generates a current I from a supply voltage 120. The output of current source 122 is connected to the source of a p-channel MOSFET transistor 125, whose drain is connected to a node 123. Also connected to the node 123 through a p-channel MOSFET 182 is a second current source 184. Current source 184 can supply current which is ¼ of the current I. The drain of transistor 182 is also connected to node 123. The gate of transistor 182 is driven by an inverter 180, whose input is connected to the gate of transistor 125 and to the counter output Q13.