Liquid crystal on silicon device
AssigneeThree-Five Systems, Inc.
InventorsJoseph Terence Smith, Jerome A. Frazee
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AssigneeThree-Five Systems, Inc.
InventorsJoseph Terence Smith, Jerome A. Frazee
Estimating the term…
A liquid crystal on silicon device comprises a mirror layer comprising a plurality of mirror electrodes, a passivation layer formed on the surface of the mirror layer comprising a plurality of openings to the mirror electrodes, and a liquid crystal layer being arranged on top of the alignment layer. Ions trapped in the alignment layer are discharged through the opening by means of the mirror electrodes of the mirror layer.
Semiconductor arrangement within a liquid crystal on silicon device, comprising:
Method of manufacturing a semiconductor arrangement, comprising the steps of:
Liquid crystal on silicon device comprising:
Dependencies are inferred from the claim text.
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Active matrix addressed cells: formed on a semiconductor substrate, e.g. of silicon
Structural association of cells with optical devices, e.g. polarisers or reflectors: reflecting elements
Constructional arrangements; Manufacturing methods: surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers: having conducting property
Term ended 14 Mar 2022 (estimated)
The present invention relates to liquid crystal on silicon having pixel cell arrays for silicon light valves and in particular to microdisplays comprising a liquid crystal on silicon.
Liquid crystal displays (LCDs) are commonly used in devices such as portable televisions, portable computers, control displays, and cellular phones to display information to a user. LCDs act in effect as a light valve, i.e., they allow transmission of light in one state, block the transmission of light in a second state, and some include several intermediate stages for partial transmission. When used as a high resolution information display, as in one application of the present invention, LCDs are typically arranged in a matrix configuration with independently controlled pixels (the smallest segment of the display). Each individual pixel is signaled to selectively transmit or block light from a backlight (transmission mode), from a reflector (reflective mode), or from a combination of the two (transflective mode).
LCDs are actuated pixel-by-pixel, either one at a time or a plurality simultaneously. A voltage is applied to each pixel mirror electrode and the liquid crystal responds to the voltage by transmitting a corresponding amount of light. In some LCDs an increase in the actuation voltage decreases transmission, while in others it increases transmission. When multiple colors are involved for each pixel, multiple voltages are applied to the pixel at different positions or times depending upon the LCD. Each voltage controls the transmission of a particular color. For example, one pixel can be actuated to allow only blue light to be transmitted while another allows only green. A greater number of different light levels available for each color results in a much greater number of possible combination colors.
FIG. 1 shows a sectional view of a microdisplay according to the prior art;
FIG. 2 shows a sectional view of a first embodiment according to the present inventon;
FIG. 3 shows a sectional view of a second embodiment according to the present invention;
As described above, liquid crystal on silicon (LCOS) microdisplays can experience image retention if mobile ions can enter and charge the liquid crystal alignment layer. FIG. 2 shows a partial sectional view of a microdisplay, generally represented by the numeral 200, according to the present invention which avoids this effect. Only the relevant parts of the microdisplay according to the present invention are shown in this figure. A semiconductor substrate 210 comprises a region 220 which extends from the surface of the substrate 210 into the substrate. This region forms the drain or source of a NMOS field effect transistor. From the surface of this substrate 210 extends a dielectric layer such as an silicon dioxide layer 215. Within this layer is a gate 230 which slightly overlaps the source/drain region 220 and covers a channel of the NMOS field effect transistor. On the surface of the silicon dioxide layer is a plurality of reflective metal pixel electrodes 260 arranged. These pixel electrodes 260 form a pixel mirror. A interconnecting structure similar to those shown in FIG. 1 is formed by two vias 225 and 240 and an intermittent metal layer 235. This structure 225, 235, and 240 interconnects the source/drain region 220 with the pixel mirror electrode 260. Pixel electrode 260 is covered by a passivation layer 290. An opening 280 in passivation layer 290 is provided. On top of passivation layer 290 is a alignment layer 270 deposited. On top of this structure follows the liquid crystal layer 205, polarizer (not shown in FIG. 2), glass layer (not shown in FIG. 2), etc. as known from the prior art. Not shown is the electrical connection from the source/drain region 220 within each pixel to a pixel analog voltage storage capacitor that could be constructed using a top plate electrode of metal or polysilicon, an insulating layer, such as SiO2, and a capacitor bottom plate that can be metal, polysilicon, or the silicon substrate.
The exemplary embodiment shown in FIG. 2 provides a unique method to discharge mobile ions which are trapped in the alignment layer 270 by incorporating a conductive path 280 from the liquid crystal alignment layer 270 to the LCOS pixel mirror electrode 260.
Mobile ions can be trapped in the liquid crystal alignment layer 270 unless a conductive path 280 is provided to the surface of the pixel electrode or pixel mirror electrode 260 in the passivation layer 290. Passivation layer 290 is required to provide scratch and corrosion protection of the highly reflective aluminum mirror surface plus to provide a barrier against mobile ion penetration into the active transistor circuitry which may degrade the silicon device reliability. Additionally, the passivation layer 290 improves the light reflectivity by incorporating alternating dielectric layers with different indices of refraction. To preserve integrity of the mobile ion barrier, the conductive path 280 needs to be opened up over the top of each pixel mirror electrode 260 (only one shown in FIG. 2), which allows the pixel mirror electrode 260 to also function as a mobile ion barrier. Mobile ions in the material above passivation layer 290 will then be prevented from reaching the NMOS transistor gate 230 and the source/rain region 220.