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US 6,686,863 B1Granted
A/D signal conversion based on a comparison of voltage-divided signals
AssigneeIntel Corporation
InventorsJames E. Jaussi, Bryan K. Casper
Life of this patent
Estimating the term…
Abstract
According to some embodiments, a circuit includes two voltage dividers, each adapted to receive different ones of two signals, the two signals together representing a data signal, and a comparator to compare a voltage generated by a first of the two voltage dividers with a voltage generated by a second of the two voltage dividers.
Claims17
A circuit, comprising:
- a first voltage divider having a first end node and a second end node, the first end node to receive a first signal from a first signal line and the second end node to be coupled to ground, an impedance of the first voltage divider to match an impedance of the first signal line;
- a second voltage divider having a third end node and a fourth end node, the third end node to receive a second signal from a second signal line and the fourth end node to be coupled to ground, an impedance of the second voltage divider to match an impedance of the second signal line, and the first signal and the second signal together representing a data signal;
- and
- a comparator to compare a voltage generated by the first voltage divider with a voltage generated by the second voltage divider.
1 more element
A circuit, comprising:
- a first resistor string having a first end node and a second end node, the first end node to receive a first signal from a first signal line and the second end node to be coupled to ground, an impedance of the first resistor string to match an impedance of the first signal line;
- a second resistor string having a third end node and a fourth end node, the third end node to receive a second signal from a second signal line and the fourth end node to be coupled to ground, an impedance of the second resistor string to match an impedance of the second signal line, and the first signal and the second signal together representing a data signal;
- and
- a decoding circuit to generate a code representing the data signal based on a comparison of a first voltage generated by the first resistor string and a second voltage generated by the second resistor string.
1 more element
A circuit comprising:
- a first voltage divider having a first end node and a second end node, the first voltage divider to generate a first plurality of voltages based on a first signal received from a first signal line to be coupled to the first end node, the second end node to be coupled to ground, and an impedance of the first voltage divider to match an impedance of the first signal line;
- a second voltage divider having a third end node and a fourth end node, the second voltage divider to generate a second plurality of voltages based on a second signal received from a second signal line to be coupled to the third end node, the fourth end node to be coupled to ground, and an impedance of the second voltage divider to match an impedance of the second signal line, and the first signal and the second signal together representing a data signal;
- and
- a decoding circuit to generate a code representing the data signal based on a comparison of a first voltage of the first plurality of voltages and a second voltage of the second plurality of voltages.
1 more element
A method comprising:
- receiving a first signal from a first signal line coupled to a first end node of a first voltage divider, a second end node of the first voltage divider coupled to ground, and an impedance of the first voltage divider to match an impedance of the first signal line;
- receiving a second signal from a second signal line coupled to a third end node of a second voltage divider, a fourth end node of the second voltage divider coupled to ground, an impedance of the second voltage divider to match an impedance of the second signal line, and the first signal and the second signal together representing a data signal;
- generating a first plurality of voltages based on the first signal using the first voltage divider;
- generating a second plurality of voltages based on the second signal using the second voltage divider;
- comparing a first voltage of the first plurality of voltages and a second voltage of the second plurality of voltages;
- and
- generating a code representing the data signal based on the comparison.
4 more elements
A system comprising:
- an analog to digital converter comprising:
- a first voltage divider having a first end node and a second end node, the first voltage divider to generate a first plurality of voltages based on a first signal received from a first signal line to be coupled to the first end node, the second end node to be coupled to ground, and an impedance of the first voltage divider to match an impedance of the first signal line;
- a second voltage divider having a third end node and a fourth end node, the second voltage divider to generate a second plurality of voltages based on a second signal received from a second signal line to be coupled to the third end node, the fourth end node to be coupled to ground, and an impedance of the second voltage divider to match an impedance of the second signal line, and the first signal and the second signal together representing a data signal;
- and
- a decoding circuit to generate a code representing the data signal based on a comparison of a first voltage of the first plurality of voltages and a second voltage of the second plurality of voltages;
- and
- a memory to store data represented by the data signal.
4 more elements
Dependencies are inferred from the claim text.