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US 6,686,794 B1Granted
Differential charge pump
AssigneeIntel Corporation
InventorsCindra W. Abidin, Georgios Asmanis
Life of this patent
Estimating the term…
Abstract
According to some embodiments, a charge pump includes a first current source coupled to a first and a second switch, each of the first and the second switch to receive a respective component of a first differential control signal, a second current source coupled to a third and a fourth switch, each of the third and the fourth switch to receive a respective component of a second differential control signal, the first switch and the third switch coupled to a first node to provide a first component of a differential output signal, and the second switch and the fourth switch coupled to a second node to provide a second component of the differential output signal, a third current source to source current to the first node, and a fourth current source to source current to the second node.
Claims14
A charge pump comprising:
- a first current source coupled to a first and a second switch, the first switch to receive a first component of a first differential control signal, and the second switch to receive a second component of the first differential control signal;
- a second current source coupled to a third and a fourth switch, the third switch to receive a first component of a second differential control signal, and the fourth switch to receive a second component of the second differential control signal, the first switch and the third switch coupled to a first node to provide a first component of a differential output signal, and the second switch and the fourth switch coupled to a second node to provide a second component of the differential output signal;
- a third current source coupled to the first node, the third current source to generate a third current and to source the third current to the first node, the third current source comprising:
- a first transistor, a source of the first transistor coupled to a supply voltage and a gate of the first transistor coupled to a first bias voltage;
- a second transistor, a source of the second transistor coupled to a drain of the first transistor and a gate of the second transistor coupled to a second bias voltage;
- a third transistor, a source of the third transistor coupled to the supply voltage and a gate of the first transistor coupled to a third bias voltage received from a common-mode feedback amplifier;
- and
- a fourth transistor, a source of the fourth transistor coupled to a drain of the third transistor, a gate of fourth transistor coupled to the second bias voltage, and a drain of the fourth transistor coupled to a drain of the second transistor;
- and
- a fourth current source coupled to the second node, the fourth current source to generate a fourth current and to source the fourth current to the second node.
7 more elements
A charge pump comprising:
- a first current source coupled to a first and a second switch, the first switch to receive a first component of a first differential control signal, and the second switch to receive a second component of the first differential control signal;
- a second current source coupled to a third and a fourth switch, the third switch to receive a first component of a second differential control signal, and the fourth switch to receive a second component of the second differential control signal, the first switch and the third switch coupled to a first node to provide a first component of a differential output signal, and the second switch and the fourth switch coupled to a second node to provide a second component of the differential output signal;
- a third current source coupled to the first node, the third current source to generate a third current and to source the third current to the first node, the third current source comprising:
- a first transistor, a source of the first transistor coupled to a supply voltage and a gate of the first transistor coupled to a first bias voltage;
- a second transistor, a source of the second transistor coupled to the supply voltage, a gate of the first transistor coupled to a second bias voltage received from a common-mode feedback amplifier, and a drain of the second transistor coupled to a drain of the first transistor;
- and
- a third transistor, a source of the third transistor coupled to the drain of the second transistor and to the drain of the first transistor and a gate of the third transistor coupled to a third bias voltage;
- and
- a fourth current source coupled to the second node, the fourth current source to generate a fourth current and to source the fourth current to the second node.
6 more elements
A system comprising:
- a transceiver comprising:
- a first current source coupled to a first and a second switch, the first switch to receive a first component of a first differential control signal, and the second switch to receive a second component of the first differential control signal;
- a second current source coupled to a third and a fourth switch, the third switch to receive a first component of a second differential control signal, and the fourth switch to receive a second component of the second differential control signal, the first switch and the third switch coupled to a first node to provide a first component of a differential output signal, and the second switch and the fourth switch coupled to a second node to provide a second component of the differential output signal;
- a third current source coupled to the first node, the third current source to generate a third current and to source the third current to the first node, the third current source comprising:
- a first transistor, a source of the first transistor coupled to a supply voltage and a gate of the first transistor coupled to a first bias voltage;
- a second transistor, a source of the second transistor coupled to a drain of the first transistor and a gate of the second transistor coupled to a second bias voltage;
- a third transistor, a source of the third transistor coupled to the supply voltage and a gate of the first transistor coupled to a third bias voltage received from a common-mode feedback amplifier;
- and
- a fourth transistor, a source of the fourth transistor coupled to a drain of the third transistor, a gate of fourth transistor coupled to the second bias voltage, and a drain of the fourth transistor coupled to a drain of the second transistor;
- and
- a fourth current source coupled to the second node, the fourth current source to generate a fourth current and to source the fourth current to the second node;
- and
- an optical interface coupled to the transceiver to receive and to transmit optical signals.
10 more elements
A system comprising:
- a transceiver comprising:
- a first current source coupled to a first and a second switch, the first switch to receive a first component of a first differential control signal, and the second switch to receive a second component of the first differential control signal;
- a second current source coupled to a third and a fourth switch, the third switch to receive a first component of a second differential control signal, and the fourth switch to receive a second component of the second differential control signal, the first switch and the third switch coupled to a first node to provide a first component of a differential output signal, and the second switch and the fourth switch coupled to a second node to provide a second component of the differential output signal;
- a third current source coupled to the first node, the third current source to generate a third current and to source the third current to the first node, the third current source comprising:
- a first transistor, a source of the first transistor coupled to a supply voltage and a gate of the first transistor coupled to a first bias voltage;
- a second transistor, a source of the second transistor coupled to the supply voltage, a gate of the first transistor coupled to a second bias voltage received from a common-mode feedback amplifier, and a drain of the second transistor coupled to a drain of the first transistor;
- and
- a third transistor, a source of the third transistor coupled to the drain of the second transistor and to the drain of the first transistor and a gate of the third transistor coupled to a third bias voltage;
- and
- a fourth current source coupled to the second node, the fourth current source to generate a fourth current and to source the fourth current to the second node;
- and
- an optical interface coupled to the transceiver to receive and to transmit optical signals.
9 more elements
Dependencies are inferred from the claim text.