Method for power conversion using combining transformer

#The present invention generally relates to the area of powering low voltage, high current electronics. In particular, the invention may be applicable in the field of computing, and much of the following description is presented in that context. It should be understood, however, that the invention is in no way limited to the field of computing, and may be applicable to a wide variety of circumstances wherein a variety of power absorbing loads may abruptly change their power absorbing characteristics (that is to say, their impedance may undergo a rapid change). The invention may also be applicable if such loads are separated physically such that the voltage which may be dropped across the dynamic impedance of the power carrying conductors is a significant fraction of the voltage delivered to such loads. It may also be increasingly applicable to applications wherein design tradeoffs are forcing a steady decrease in operating voltages. Such situations may arise in telecommunications, radar systems, vehicle power systems and the like, as well as in computing systems.

#The architecture of computing systems has undergone tremendous changes in the recent past, due principally to the advance of microcomputers from the original four-bit chips running at hundreds of kilohertz to the most modern 32 and 64 bit microprocessors running at hundreds of megahertz. As the chip designers push to higher and higher speeds, problems may arise which relate to thermal issues. That is, as the speed of a circuit is increased, the internal logic switches each may discharge its surrounding capacitance that much faster. Since the energy stored in that capacitance may be considered fixed (at a given voltage), as the speed is increased, that energy, which may be dissipated in the switches, may be dumped into the switch that many more times per second. Since energy per second may be defined as power, the power lost in the switches therefore increases directly with frequency.

#On the other hand, the energy stored in a capacitance may increase as the square of the voltage, so a capacitor charged to two volts may store only 44% of the energy that may be stored in that same capacitor charged to three volts. For this reason, a microcomputer designed to operate at two volts will, when run at the same speed, dissipate much less power than the same microprocessor operating at three volts. There may be a tendency, therefore, to lower the operating voltage of microprocessors.

#FIG. 1 depicts one embodiment of a buck converter in accordance with principles known in the prior art, together with its waveforms.

#FIG. 2 depicts a particular embodiment of a four phase buck converter in accordance with principles known in the prior art.

#FIG. 3 depicts the waveforms for the four phase buck converter circuit embodiment of FIG. 2.

#As can be easily understood, the basic concepts of the present invention may be embodied in a variety of ways. These concepts involve both processes or methods as well as devices to accomplish such. In addition, while some specific circuitry is disclosed, it should be understood that these not only accomplish certain methods but also can be varied in a number of ways. As can be seen from the drawings, the basic concepts of the present invention may be embodied in many different ways. Importantly, as to all of the foregoing, all of these facets should be understood to be encompassed by this disclosure.

#In the production of a low regulated dc voltage from a higher voltage source, the so-called “buck” converter may be commonly used. This converter, illustrated in FIG. 1, may be considered a simple circuit with generally four basic components: two electronic switches, one inductor, and one capacitor. If the output voltage is large compared with the voltage drop across a diode, the lower electronic switch may be replaced by a diode.

#The circuit in FIG. 1 works as follows. Switches 2 may be periodically and alternately actuated so that part of the period the voltage at node 3 may be equal to zero and part of the period the voltage may be equal to supply voltage 1. Thus the voltage at node 3 may be a pulsed waveform, as shown in the lower portion of FIG. 1, with an average value generally less than input voltage 1. During the time the upper switch is on, the current may increase in inductor 4 and during the time the lower switch is on the current in inductor 4 may decrease. The output voltage 7 across load resistance 5 may be equal to the average value of the pulsed waveform at node 3 (and, therefore, may be less than input voltage 1) and may be dc with a superimposed ripple as shown in the lower part of FIG. 1. Regulation or adjustment of the output 7 is obtained by varying the percentage of the time the upper switch is closed relative to the lower switch.