Plasma display apparatus

#The present invention relates to a plasma display apparatus that provides a gradated display using a subfield method.

#The plasma display apparatus (PDP apparatus) has been put into practical use as a flat display and is a thin display of high-luminance. In the PDP apparatus, since it is only possible to control each display cell to be lit or not, a display field is made to consist of plural subfields and the subfields to be lit are combined in each cell to provide a gradated display. Each subfield comprises at least an address period during which a display cell is selected and a sustain period during which the selected cell is lit. In the sustain period, a sustain pulse is applied to cause a sustain discharge to occur, and the luminance is determined by the number of sustain pulses. As a result, if the cycle of the sustain pulse is the same, the luminance is determined by the length of the sustain period. Although the most general and efficient structure of the subfield is that in which the lengths of the sustain periods in the subfields, serially increase and the ratio of the length of the sustain period in a subfield to that of the previous one is 2, various subfield structures have been proposed recently in order to suppress false contours. The present invention can be applied to any PDP apparatus that performs display using any subfield structure.

#Moreover, various methods have been proposed for the PDP apparatus, and the present invention can be applied to a PDP apparatus that employs any method. As the structures and the driving methods of the PDP apparatus are widely known, a detailed description is omitted here.

#The features and advantages of the present invention will be more clearly understood from the following description taken in conjunction with the accompanying drawings, in which:

#FIG. 1 is a diagram that illustrates the relationship between the display load ratio and the effective sustain voltage according to the sustain pulse cycle.

#FIG. 2 is a diagram that illustrates the principles of the present invention.

#FIG. 3 is a block diagram that shows the rough structure of the PDP apparatus in the first embodiment of the present invention. As shown schematically, the PDP apparatus comprises a plasma display panel 11, an address electrode drive circuit 12 that puts out a signal to drive the address electrode of the panel 11, a scan electrode drive circuit 113 that puts out a scan pulse to be applied sequentially to a scan electrode (Y electrode) and a reset pulse and a sustain pulse, a sustain electrode drive circuit 14 that puts out a reset pulse and a sustain pulse to be applied to a sustain electrode (X electrode), an A/D conversion circuit 21 that generates a timing signal as well as converting a video input signal into a digital signal, a display gradation adjusting circuit 22 that adjusts the number of gradations of a video signal by processes such as dithering and error diffusion, a video signal-SF matching circuit 23 that determines the combination of the lit subfields to perform the gradated display for each cell by expanding the adjusted video digital signal, and an SF process circuit 24 that generates a drive signal for subfield display, and the drive signal is supplied from the SF process circuit 24 to the address electrode drive circuit 12, the scan electrode drive circuit 13, and the sustain electrode drive circuit 14. Since the above-mentioned structure is the same as that of the conventional PDP apparatus of the prior art, a detailed description of the waveforms, and so on, is omitted here.

#The PDP apparatus in the first embodiment comprises an SF load ratio detecting circuit 25 that detects the display load ratio of each subfield, a sustain cycle change circuit 26 that changes the sustain pulse cycle of each subfield according to the detected display load ratio of each subfield, a vacant time calculating circuit 27 that calculates the variations in the vacant time when the sustain pulse cycle is changed, a vacant time redistributing circuit 28 that redistributes the calculated vacant time in proportion to the product of the luminance ratio of each subfield and the sustain pulse cycle, and a display gradation correcting circuit 29 that allocates the sustain pulse to the distributed time in such a way as to increase or decrease over plural fields in order to maintain the continuity of the luminance. The vacant time calculating circuit 27 and the vacant time redistributing circuit 28 correspond to the adaptive sustain pulse number changing means.

#FIG. 4 is a diagram that illustrates the relationship between the video signal and the processes in the first embodiment. As shown schematically, there is a vertical synchronization signal VIN at the top of a display field, which detects the start of each display field. After the vertical synchronization signal VIN, the video signal is input. After all the video signals of each field are input, a process 1 is carried out by the time the input of the video signal of the next field is started. Subsequently, in synchronization with the start of each subfield, a process 2 is executed and a display is performed by the generation of the drive signal for each subfield.