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US 6,686,651 B1Granted
Multi-layer leadframe structure
AssigneeAmkor Technology, Inc.
InventorDonald Craig Foster
Life of this patent
Estimating the term…
Abstract
A leadframe and a package including the leadframe are disclosed. At least one lead includes a nonconductive layer on the inner end segment of the lead set back from its inner end. An electrically conductive layer is on a surface of the nonconductive layer. The nonconductive layer electrically isolates the electrically conductive layer from the lead upon which the nonconductive layer is positioned. The lead itself and the electrically conductive layer thereon are separately available for electrical connection to a semiconductor chip. The electrically conductive layer in turn may be electrically coupled to a second lead, with the electrically conductive layer serving as a bridge for an electrical connection between the chip and the second lead.
Claims46
A leadframe comprising:
- a plurality of metal leads, each lead including an inner end segment beginning at an inner end of the lead;
- a nonconductive layer on the inner end segment of at least one of the leads;
- and
- an electrically conductive layer on a surface of the nonconductive layer and generally parallel to a longitudinal direction of the inner end segment, wherein the nonconductive layer electrically isolates the electrically conductive layer from the respective lead upon which the nonconductive layer is positioned;
- wherein the inner end segment of each of a first subset of the leads extends further toward a center of the lead frame than the inner end segment of each of a second subset of the leads;
- and
- wherein a width of the inner end segment of the first subset of the leads is greater than a width of the inner end segments of the second subset of the leads.
4 more elements
A leadframe comprising:
- a plurality of metal leads, each lead including an inner end segment beginning at an inner end of the lead;
- a nonconductive layer on the inner end segment of at least one of the leads;
- and
- an electrically conductive layer on a surface of the nonconductive layer and generally parallel to a longitudinal direction of the inner end segment, wherein the nonconductive layer electrically isolates the electrically conductive layer from the respective lead upon which the nonconductive layer is positioned;
- wherein the inner end segment of each of a first subset of the leads extends further toward a center of the lead frame than the inner end segment of each of a second subset of the leads;
- and
- wherein leads of the first subset are each adjacent to at least one lead of the second subset, thereby forming plural sets of leads, each including one lead of the first subset and at least one lead of the second subset, wherein each lead of the first subset includes the nonconductive layer and the electrically conductive layer.
4 more elements
A semiconductor package comprising:
- a plurality of metal leads, each lead including an inner end segment beginning at an inner end of the lead;
- a nonconductive layer on the inner end segment of at least a first one of the leads and set back from its inner end;
- an electrically conductive layer on a surface of the nonconductive layer positioned entirely between opposite edges of the first lead, wherein the nonconductive layer electrically isolates the electrically conductive layer from the first lead upon which the electrically conductive layer is positioned;
- and
- a semiconductor chip separately electrically coupled to the inner end segment and the electrically conductive layer of the first lead, wherein a second one of the leads also is electrically coupled to the electrically conductive layer.
2 more elements
A semiconductor package comprising:
- a plurality of metal leads, each lead including an inner end segment beginning at an inner end of the lead;
- a nonconductive layer on the inner end segment of at least a first one of the leads and set back from its inner end;
- an electrically conductive layer on a surface of the nonconductive layer, wherein the nonconductive layer electrically isolates the electrically conductive layer from each said first lead upon which the nonconductive layer is positioned;
- and
- a semiconductor chip separately electrically coupled to the inner end segment and the electrically conductive layer of the first lead, wherein a second one of the leads also is electrically coupled to the electrically conductive layer;
- wherein a width of the inner end segment of the first lead is greater than a width of the inner end segment of the second lead, the second lead is adjacent the first lead, and the inner end segment of the second lead terminates outward of the inner end segment of the first lead.
3 more elements
A semiconductor package comprising:
- a plurality of metal leads, each lead including an inner end segment beginning at an inner end of the lead;
- a nonconductive layer on the inner end segment of at least a first one of the leads and set back from its inner end;
- an electrically conductive layer on a surface of the nonconductive layer, wherein the nonconductive layer electrically isolates the electrically conductive layer from the respective lead upon which the nonconductive layer is positioned;
- and
- a semiconductor chip separately electrically coupled to the inner end segment and the electrically conductive layer of the first lead, wherein a second one of the leads also is electrically coupled to the electrically conductive layer;
- wherein the electrically conductive layer contacts the second lead.
3 more elements
A semiconductor package comprising:
- a plurality of first leads and a plurality of second leads, each said first lead being associated with at least one of the second leads;
- a plurality of separate dielectric layers, each said dielectric layer on a first surface of only one said first lead;
- a plurality of separate electrically conductive layers, each said electrically conductive layer on a surface of one of the dielectric layers;
- a semiconductor chip electrically coupled to the first leads, and electrically coupled to respective ones of the second leads through the electrically conductive layer on the first lead associated with the respective second lead.
1 more element
A semiconductor package comprising:
- a plurality of first leads and a plurality of second leads, each said first lead being associated with at least one of the second leads;
- a plurality of separate dielectric layers, each said dielectric layer on a first surface of an associated first lead;
- a plurality of separate electrically conductive layers, each said electrically conductive layer on a surface of an associated one of the dielectric layers;
- a semiconductor chip electrically coupled to the first leads, and electrically coupled to the respective second leads through the electrically conductive layer on the dielectric layer associated with the first lead with which the respective second lead is associated, wherein at least one of the second leads is between each pair of the first leads.
1 more element
A leadframe comprising:
- a plurality of metal leads adjacent a central die mounting region of the leadframe, each said lead having an inner end;
- a metal strip transverse to the leads between the inner end of the leads and the central die mounting region, wherein the metal strip is integral with and connected between metal tie bars, said tie bars extending from adjacent comers of the leadframe toward the central die mounting region;
- a nonconductive layer on the metal strip, wherein a portion of the metal strip is exposed adjacent the nonconductive layer;
- and
- a conductive layer on the nonconductive layer and electrically isolated from the metal strip by the nonconductive layer.
2 more elements
A semiconductor package comprising:
- a plurality of metal leads adjacent a central die mounting region, each said lead having an inner end;
- a metal strip transverse to the leads between the inner end of the leads and the central die mounting region, wherein the metal strip is integral with and connected between metal tie bars, said tie bars extending inward toward the central die mounting region from adjacent corners of the semiconductor package;
- a nonconductive layer on the metal strip, wherein a portion of the metal strip is exposed;
- a conductive layer on the nonconductive layer and electrically isolated from the metal strip by the nonconductive layer;
- a semiconductor chip located in the central die mounting region and separately electrically coupled to the exposed portion of the metal strip and to the conductive layer;
- and
- an encapsulating material covering the semiconductor chip, the metal strip, the nonconductive layer, the conductive layer, and at least a portion of the leads.
4 more elements
Dependencies are inferred from the claim text.