Multiple conductive plug structure for lateral RF MOS devices

A semiconductor device, comprising:

• a semiconductor substrate of a first conductivity type and having a substrate dopant concentration;
• a semiconductor material overlying said substrate, said semiconductor material having a first conductivity type, said semiconductor material having a first dopant concentration and a top surface;
• a plurality of transistor disposed upon said top surface of said semiconductor material, at least some of said plurality of transistors having a lateral DMOS structure, including:
• a conductive gate overlying a portion of and insulated from the top surface of said semiconductor material;
• a first region formed completely within said semiconductor material to a first depth level, said first region being of a second conductivity type, and having a second dopant concentration to form a first enhanced drain drift region of said RF MOS transistor;
• a second region formed in said semiconductor material to a second depth level, said second region being of said second conductivity type and having a third dopant concentration to form a second enhanced drain drift region of said RF MOS transistor, said second region contacting said first region, said third dopant concentration being higher than said second dopant concentration;
• a third region formed in said semiconductor material, said third region being of said second conductivity type and having a fourth dopant concentration greater than said third dopant concentration to form a drain region of said RF MOS transistor, said third region contacting said second region;
• a fourth region formed in said semiconductor material, said fourth region being of said first conductivity type and having a fifth dopant concentration to form a body region of said RF MOS transistor, said fifth dopant concentration being at least equal to said first dopant concentration, said fourth region having a first end underlying said conductive gate, any remaining portion of said semiconductor material underlying said gate being of said first conductivity type;
• a fifth region formed in said semiconductor material, said fifth region being of said second conductivity type and having a sixth dopant concentration to form a source region of said RF MOS transistor, said fifth region being located within said fourth region;
• a sixth region formed in said semiconductor material, said sixth region being of said first conductivity type and having a seventh dopant concentration to form a body contact region of said RF MOS transistor, said seventh dopant concentration being greater than said fifth dopant concentration of said fourth region, said sixth region contacting said fourth region;
• and
• a plug region connecting said semiconductor material of said first conductivity type to a backside of said transistor.