Method of etching a trench in a silicon-containing dielectric material

A method of forming a vertical interconnect in a semiconductor structure, comprising:

• a) providing a first patterned photoresist layer overlying a continuous layer of a silicon-containing dielectric material which is absent an intermediate etch stop layer, said dielectric material having a dielectric constant of about 4 or less, where the silicon-containing dielectric layer overlies a metallic interconnect layer;
• b) pattern etching a vertical opening to a first nominal depth in said silicon-containing dielectric layer;
• c) removing said first photoresist layer;
• d) applying a protective conformal layer over said semiconductor structure, including the surfaces of said vertical opening;
• e) forming a second patterned photoresist layer over an upper, field surface of said semiconductor structure and in contact with said conformal coating which is present on said upper surface;
• and
• f) pattern etching a trench to a second nominal depth in said silicon-containing dielectric layer using a plasma generated from a source gas consisting essentially of a fluorine-containing etchant gas and an additive gas selected from the group consisting of carbon monoxide (CO), inert gas, and combinations thereof, wherein a volumetric flow ratio of said additive gas to said fluorine-containing etchant gas is within the range of about 1.25:1 to about 20:1, and wherein said fluorine-containing etchant gas is selected from the group consisting of a fluorocarbon gas having a fluorine:
• carbon ratio of at least about 3:1, SF6, NF3, and combinations thereof.