Sidewall coverage for copper damascene filling
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShau-Lin Shue, Mei-Yun Wang, Chen-Hua Yu
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShau-Lin Shue, Mei-Yun Wang, Chen-Hua Yu
Estimating the term…
A general process is described for filling a hole or trench at the surface of an integrated circuit without trapping voids within the filler material. A particular application is the filling of a trench with copper in order to form damascene wiring. First, a seed layer is deposited in the hole or trench by means of PVD. This is then followed by a sputter etching step which removes any overhang of this seed layer at the mouth of the trench or hole. A number of process variations are described including double etch/deposit steps, varying pressure and voltage in the same chamber to allow sputter etching and deposition to take place without breaking vacuum, and reduction of contact resistance between wiring levels by reducing via depth.
A process for filling an opening, comprising:
A damascene process resulting in improved side wall coverage, comprising:
A damascene process resulting in improved side wall coverage, comprising:
A process for filling an opening, comprising:
A damascene process resulting in improved side wall coverage, comprising:
A process for filling an opening, comprising:
A damascene process resulting in improved side wall coverage, comprising:
Dependencies are inferred from the claim text.