Buried digit spacer-separated capacitor array
AssigneeMicron Technology, Inc.
InventorDarwin A. Clampitt
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Abstract
The present invention relates to the field of semiconductor integrated circuits and, in particular, to capacitor arrays formed over the bit line of an integrated circuit substrate. The present invention provides a method for forming stacked capacitors, in which a plurality of patterned capacitor outlines, or walls, are formed over the bit line of a semiconductor device. In one aspect of the invention, spacers are formed on the patterned capacitor outlines and become part of the cell poly after being covered with cell nitride. In another aspect, the spacers are formed of a material capable of being etched back, such as titanium nitride. In another aspect, a metal layer is patterned and annealed to a polysilicon layer to form a mask for a capacitor array, and subsequently etched to form the array.
Claims59
A method of forming a semiconductor memory structure comprising:
- forming a capacitor support structure over a digit line and over a substrate, said support structure including interconnected sidewalls defining containers between said sidewalls, at least some of said containers being formed over respective capacitor plugs;
- and
- forming capacitors in at least some of said containers.
A method of forming a capacitor array comprising:
- forming a digit line over a substrate;
- providing electrical contacts extending above said digit line;
- forming a pattern of interconnected sidewalls over said electrical contacts;
- and forming capacitors electrically connected to said electrical contacts in containers defined by said sidewalls.
Dependencies are inferred from the claim text.