Method for manufacturing non-volatile memory device and non-volatile memory and semiconductor device

A method for manufacturing a semiconductor device having a ferroelectric capacitor that is provided between a lower electrode and an upper electrode, the method for manufacturing a semiconductor device comprising the steps of;

• providing a semiconductor substrate including a transistor,
• forming an insulation layer overlying the transistor,
• forming a lower electrode over the insulation layer, wherein the lower electrode is in electrical contact with a part of the transistor,
• forming partitioning members over the insulation layer, the partitioning members adapted to separate the lower electrode from other lower electrodes, and
• depositing a solution for forming an organic layer over the lower electrode that is partitioned from other lower electrodes by the partitioning members, wherein the organic layer is not deposited directly above the partitioning members, and thereafter solidifying the same to form the organic layer.

A method for manufacturing a semiconductor device having a ferroelectric capacitor that is provided between a lower electrode and an upper electrode, the method for manufacturing a semiconductor device comprising the steps of:

• providing a semiconductor substrate including a transistor,
• forming an insulation layer overlying the transistor,
• forming a lower electrode over the insulation layer, wherein the lower electrode is in electrical contact with a part of the transistor,
• forming partitioning members over the insulation layer, the partitioning members adapted to separate the lower electrode from other lower electrodes,
• coating a solution for forming an organic layer on the lower electrode, and
• solidifying the same to form the organic layer,
• wherein the solution for the organic layer is coated over the lower electrode by using an ink jet type recording head;
• and wherein after the organic layer is coated over the lower electrode, the solution is positioned between the partitioning members and not directly above an upper surface of the partitioning members.

A method for manufacturing a semiconductor device having a ferroelectric capacitor that is provided between a lower electrode and an upper electrode, the method for manufacturing a semiconductor device comprising:

• providing a semiconductor substrate including a transistor,
• forming an insulation layer overlying the transistor,
• forming a lower electrode over the insulation layer, wherein the lower electrode is in electrical contact with a part of the transistor,
• forming partitioning members over the insulation layer, the partitioning members adapted to separate the lower electrode from other lower electrodes,
• coating a solution for forming an organic layer on the lower electrode so that the solution is not positioned directly above the partitioning members, and
• solidifying the same to form the organic layer,
• wherein a solution containing fine particles of the upper electrode is coated over the organic layer and solidified to thereby form the upper electrode.

A method for manufacturing a non-volatile memory device including a ferroelectric capacitor, comprising:

• providing a semiconductor device including a plurality of transistors,
• forming an insulation layer overlying the transistors,
• forming a plurality of lower electrodes separated from one another over the insulation layer, wherein the lower electrodes have electrical contacts with part of the transistors,
• forming partitioning members over the insulating layer,
• applying a solution to form an organic layer on the lower electrodes between the partitioning members, wherein after the solution is applied, the solution is only positioned in a region between the partitioning members;
• solidifying at least part of the applied solution to form the organic layer, and
• forming an upper electrode over the organic layer.

A method for manufacturing a semiconductor device comprising:

• providing a semiconductor substrate including a transistor,
• forming an insulation layer overlying the transistor,
• forming a lower electrode over the insulation layer, wherein the lower electrode is in electrical contact with a part of the transistor,
• forming partitioning members over the insulation layer that separate the lower electrode from other lower electrodes,
• applying a solution for forming an organic layer on the lower electrode so that after the solution is applied, the solution is positioned between the partitioning members and not above the partitioning members,
• solidifying at least a portion of the solution for forming an organic layer, and
• forming an upper electrode after the solidifying at least a portion of the solution for forming an organic layer, wherein said forming an upper electrode comprises applying a solution for forming an upper electrode and solidifying at least a portion of the solution for forming an upper electrode.

A method for manufacturing a semiconductor device comprising:

• providing a semiconductor substrate including a transistor,
• forming an insulation layer overlying the transistor,
• forming a lower electrode over the insulation layer, wherein the lower electrode is in electrical contact with a part of the transistor,
• forming partitioning members over the insulation layer,
• applying a solution to form an organic layer on the lower electrode and between side surfaces of the partitioning members, so that no portion of the solution is positioned above the partitioning members, and solidifying at least a portion of the solution to form an organic layer so that the organic layer is formed,
• forming an upper electrode on the organic layer, and
• forming a plurality of additional lower electrodes, wherein the lower electrodes are electrically isolated from each other, and applying the solution for forming the organic layer on the additional lower electrodes.

A method for forming a semiconductor device, comprising:

• providing a semiconductor substrate including a plurality of transistors,
• forming an insulation layer overlying the transistors,
• forming lower electrodes over the insulation layer to be separated from one another by partitioning members, wherein the lower electrodes are in electrical contact with part of the transistors,
• forming partitioning members over the insulation layer,
• applying a solution for forming an organic layer on the first electrodes and solidifying at least a portion of the applied solution to form an organic layer,
• wherein the partitioning members are formed to include a first insulating layer and a second insulating layer that repels the solution, and
• forming a second electrode on the organic layer on the first electrodes.

A method for forming a semiconductor device, comprising:

• forming a plurality of cells each including a transistor therein, the cells also each including a first capacitor electrode therein, the first capacitor electrodes being formed over an insulating layer, the first capacitor electrodes in adjacent cells being separated from each other,
• forming partitioning members over the insulation layer that separate the cells from one another,
• applying a solution for forming an organic layer on the first capacitor electrodes between the partitioning members, so that the solution is only positioned in a region between the partitioning members, and solidifying at least a portion of the applied solution to form an organic layer, and
• forming a continuous second capacitor electrode on the organic layer, the second capacitor electrode layer formed to be a common electrode for the cells.