Method of making an integrated circuit package
AssigneeAmkor Technology, Inc.
InventorThomas P. Glenn
Life of this patent
Estimating the term…
Abstract
A method of making a package includes providing a metal leadframe having a die pad in a rectangular frame. Tabs extend from the frame toward the die pad. The die pad and tabs have side surfaces with reentrant portions and asperities. A die is attached to the die pad. The die is electrically connected to the tabs. An encapsulant is applied to the upper and side surfaces of the leadframe. Finally, the leadframe is cut in situ so that the die pad and tabs are severed from the frame, the sides of the package are formed, and the package is severed from the leadframe.
Claims22
A method of making an integrated circuit chip package, comprising the steps of:
- a) forming a leadframe to include:
- a frame;
- a die pad integrally connected to the frame and defining opposed, generally planar first and second die pad surfaces, and at least one peripheral die pad side surface extending between the first and second die pad surfaces;
- a plurality of tabs integrally connected to the frame and extending toward the die pad in spaced relation thereto, each of the tabs defining opposed, generally planar first and second tab surfaces and at least one peripheral tab side surface extending between the first and second tab surfaces;
- and
- a reentrant portion disposed within each of the peripheral die pad and tab side surfaces;
- b) placing an integrated circuit die upon the first die pad surface of the die pad;
- c) electrically connecting the integrated circuit die to the first tab surface of each of the tabs;
- d) applying an encapsulant material to the frame, the integrated circuit die, the first die pad surface of the die pad, the first tab surface of each of the tabs, and into the reentrant portions of the peripheral die pad and tab side surfaces, without covering the second surface of each of the tabs;
- e) hardening the encapsulant material;
- and
- f) singulating the encapsulated frame so that the die pad and the tabs are severed from the frame, the second surface of each of the tabs being exposed within the package.
A method of making an integrated circuit chip package, comprising the steps of:
- a) forming a leadframe to include:
- a die pad defining opposed, generally planar first and second die pad surfaces, and at least one peripheral die pad side surface extending between the first and second die pad surfaces;
- a plurality of tabs extending toward the die pad in spaced relation thereto, each of the tabs defining opposed, generally planar first and second tab surfaces and at least one peripheral tab side surface extending between the first and second tab surfaces;
- and
- a reentrant portion disposed within each of the peripheral die pad and tab side surfaces;
- b) placing an integrated circuit die upon the first die pad surface of the die pad;
- c) electrically connecting the integrated circuit die to the first tab surface of each of the tabs;
- d) applying an encapsulant material to the integrated circuit die, the first die pad surface of the die pad, the first tab surface of each of the tabs, and into the reentrant portions of the peripheral die pad and tab side surfaces without covering the second surface of each of the tabs;
- and
- e) hardening the encapsulant material.
A method of making an integrated circuit chip package, comprising the steps of:
- a) forming a leadframe to include:
- a frame;
- a die pad integrally connected to the frame and defining opposed, generally planar first and second die pad surfaces, and at least one peripheral die pad side surface extending between the first and second die pad surfaces;
- a plurality of tabs integrally connected to the frame and extending toward the die pad in spaced relation thereto, each of the tabs defining opposed, generally planar first and second tab surfaces and at least one peripheral tab side surface extending between the first and second tab surfaces;
- and
- means disposed within each of the peripheral die pad and tab side surfaces for forming a mechanical interlock to a block of a hardened encapsulant material;
- b) placing an integrated circuit die upon the first die pad surface of the die pad;
- c) electrically connecting the integrated circuit die to the first tab surface of each of the tabs;
- d) applying an encapsulant material to the frame, the integrated circuit die, the first die pad surface of the die pad, the first tab surface of each of the tabs, and into the interlock means of the peripheral die pad and tab side surfaces, without covering the second surface of each of the tabs;
- e) hardening the encapsulant material to form the block;
- and
- f) singulating the encapsulated frame so that the die pad and the tabs are severed from the frame, the second surface of each of the tabs being exposed within the package.
Dependencies are inferred from the claim text.