# US 6,683,872 B1 · Variable rate digital switching system

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- Number: US 6,683,872 B1
- Document ID: US6683872B1
- Status: Granted
- Kind: B1
- Application number: 09/363,648
- Filed: 1999-07-30
- Granted: 2004-01-27
- Earliest claimed: 1998-07-31
- Assignees: The University of Tokyo
- Inventors: Tadao Saito; Hitoshi Aida; Terumasa Aoki; Udomkiat Bunworasate
- Web page: https://patentgrep.com/patent/US6683872B1

## CPC

- H04L 49/1576: {Crossbar or matrix}
- H04L 12/5601: {Transfer mode dependent, e.g. ATM}
- H04L 49/309: {Header conversion, routing tables or routing tags}
- H04Q 11/04: for time-division multiplexing {(H04Q11/0001 takes precedence)}
- H04L 2012/5664: {Support of Video, e.g. MPEG}
- H04L 2012/5679: {Arbitration or scheduling}
- H04Q 2213/13076: Distributing frame, MDF, cross-connect switch
- H04Q 2213/13103: Memory
- H04Q 2213/13174: Data transmission, file transfer
- H04Q 2213/13216: Code signals, frame structure
- H04Q 2213/1329: Asynchronous transfer mode, ATM
- H04Q 2213/13292: Time division multiplexing, TDM
- H04Q 2213/13297: Coupling different rates in TDM systems, data rate adaptation
- H04Q 2213/13299: Bus
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- H04Q: SELECTING (switches, relays, selectors H01H; wireless communication networks H04W)

## Abstract

There is provided a variable rate digital switching system comprising steps of: arranging a plurality of incoming TDM buses and a plurality of sending TDM buses in lattice form; providing cross-point buffers at cross-points of the incoming buses and the sending buses; connecting the cross-point buffers belonging to respective sending TDM buses to respective scheduler; connecting respective contents analyzer to respective scheduler; checking frame headers of input TDM frames by respective cross-point buffers, thereby buffering only data of time slot of destined and belonged sending bus and transmitting contents of the frame header to the contents analyzer; checking the frame header by the contents analyzer, thereby deciding the contents of data stored in the respective cross-point buffers on the own-belonged sending TDM bus, and informing them to the scheduler; performing the scheduling by the scheduler as for how time slots in the sending TDM frame is allocated in respective cross-point buffers according to the contents of the frame header and an amount of data stored in respective cross-point buffer; and inputting in turn the buffered data in the own-allocated time slots of the sending TDM frame according to the scheduling by respective cross-point buffer, and outputting them from the sending TDM bus.

## Claims

### Claim 1

A variable rate digital switching system comprising steps of:
arranging a plurality of incoming TDM buses and a plurality of sending TDM buses in lattice form;
providing cross-point buffers at cross-points of the incoming buses and the sending buses;
connecting the cross-point buffers belonging to respective sending TDM buses to respective scheduler;
checking frame header of input TDM frames by respective cross-point buffers, thereby buffering only data of time slot of destined and belonged sending bus and transmitting contents of the frame header to the scheduler;
performing the scheduling by the scheduler as for how time slots in the sending TDM frame is allocated in respective cross-point buffers according to the contents of the frame header; and
inputting in turn the buffered data in the own-allocated time slots of the sending TDM frame according to the scheduling by the respective cross-point buffer, and outputting them from the sending TDM bus.

### Claim 2

A variable rate digital switching system comprising steps of:
arranging a plurality of incoming TDM buses and a plurality of sending TDM buses in lattice form;
providing cross-point buffers at cross-points of the incoming buses and the sending buses;
connecting the cross-point buffers belonging to respective sending TDM buses to respective scheduler;
connecting respective contents analyzer to respective scheduler;
checking frame headers of input TDM frames by respective cross-point buffers, thereby buffering only data of time slot of destined and belonged sending bus and transmitting contents of the frame header to the contents analyzer;
checking the frame header by the contents analyzer, thereby deciding the contents of data stored in the respective cross-point buffers on the own-belonged sending TDM bus, and informing them to the scheduler;
performing the scheduling by the scheduler as for how time slots in the sending TDM frame is allocated in respective cross-point buffers according to the contents of the frame header and an amount of data stored in respective cross-point buffer; and
inputting in turn the buffered data in the own-allocated time slots of the sending TDM frame according to the scheduling by respective cross-point buffer, and outputting them from the sending TDM bus.

### Claim 3 (depends on 1)

A variable rate digital switching system as claimed in claim 1, characterized in that the scheduler determines the scheduling in that the time slots in the output TDM frame are assigned in turn from the cross-point buffers of the longest length of queue for the cross-point buffers of the sending line.

### Claim 4 (depends on 1)

A variable rate digital switching system as claimed in claim 1, characterized in that the scheduler determines the scheduling in that the timeslots in the output TDM frame assigned are in turn from the cross-point buffers of the shortest length of queue for the cross-point buffers of the sending line.

### Claim 5 (depends on 1)

A variable rate digital switching system as claimed in claim 1, characterized in that the scheduler determines the scheduling according to the round robin method for the cross-point buffers of the sending line.

### Claim 6 (depends on 1)

A variable rate digital switching system as claimed in claim 1, characterized in that the scheduler determines randomly the scheduling for the cross-point buffers of the sending line.

### Claim 7 (depends on 1)

A variable rate digital switching system as claimed in one of the claim 1, characterized in that the time slot length of the TDM frame is 16 kbit and the frame period of the TDM frame is a divisor of a video frame period of an input video signal contained in the TDM frames.
