System and method for efficient failover/failback techniques for fault-tolerant data storage system

#The present invention generally relates to efficient failover and failback techniques in a data storage system, and more particularly to efficient failover and failback techniques for data storage systems utilizing at least dual-active controller configuration for minimizing a delay in responding to input/output requests from a host system following a controller failure.

#Modern computers, particularly computers operating in a server environment, typically require or at least benefit from a large, fault-tolerant data storage system. Storage devices (such as hard disk drives) in all computer systems are susceptible to failures caused by temperature variations, head crashes, motor failure, controller failure, changing voltage conditions, and mechanical and electrical failure generally. To improve reliability and protect the data in data storage systems, many data storage systems use a redundant array of independent disks (RAID) controlled or operated by a disk array controller. Conventional RAID systems typically consist of several individual disk controllers combined with a rack or enclosure of storage devices to provide a fault-tolerant data storage system that is directly attached to a host computer system. The host system is then connected to a network of client computers to provide a large, fault-tolerant pool of storage accessible to all network clients. Typically, the disk array controller provides the brains of the data storage system, servicing all host requests, storing data to storage devices, such as, for example, RAID drives, caching data for fast access, and handling any drive failures without interrupting host requests.

#Disk array controllers may generally include one or both of storage controllers and caching controllers. A storage controller (or non-caching storage controller) is a device which is capable of directing data traffic from the host system to one or more non-volatile storage devices. It may or may not have an intermediary cache to stage data between the non-volatile storage device and the host system. A caching controller (or caching storage controller) is a device which is capable of directing the data traffic from a host system to one or more non-volatile storage devices which uses an intermediary data storage device (the cache memory) to stage data between the non-volatile storage device and the host system. In general, the intermediary storage device is built out of RAM or other solid-state memory to allow a quicker access time to the data. Furthermore, it provides a buffer in which to allow exclusive-or (XOR) operations to be completed for RAID Level 5 (RAID 5) operations.

#Additional advantages and features of the invention will become readily apparent upon reading the following detailed description and appended claims when taken in conjunction with reference to the following drawings, in which:

#FIG. 1 is a diagrammatic representation of an exemplary computer system to which the inventive structure and method may be applied.

#FIG. 2 is a diagrammatic representation of an exemplary controller to which the inventive structure and method may be applied.

#One technique for overcoming the controller failure problem described in the Background above is a cache mirroring system, apparatus and method for a dual-active controller environment as described in co-pending U.S. patent application Ser. No. 09/410,168 filed Sep. 30, 1999 and entitled System, Apparatus & Method Providing Cache Data Mirroring To A Data Storage System, assigned to the assignee of the present invention and hereby incorporated by reference. Referring to FIG. 1, a data storage system 100 utilizing a dual-active controller configuration is depicted. In accordance with the cache data mirror method, a Controller A (primary controller) 116 receives a write data request from the host system 102, the write data request includes data to be written by the primary controller 116 to the storage subsystem. The primary controller 116 caches the data into the primary controller 116 cache memory 120. Next, the primary controller 116 mirrors the data to Controller B (alternate controller) 118, such that the alternate controller 118 copies the data into an alternate controller cache memory 122, thereby providing a backup copy of the primary controllers 116 data in case of a controller failure.

#Referring to FIG. 2, an exemplary controller 160 is depicted. The controller 160 includes a CPU 162, a PROM 178, RAM memory 164, and a cache memory 172. The cache memory 172 includes a read/write (R/W) cache area 174, and a mirror area 176. The R/W cache area 174 is used as an intermediate storage area for cache line data in order provide the host system 100 optimized access to the cache line data without having to access the storage subsystem 108, 110. The mirror area 176 is used to store a backup copy of cache line data (backup data) mirrored from a partner controller. The mirror area 176 is provided to allow a survivor controller to take over the tasks and cache line data of a failed controller. However, in the event of a controller failure, the survivor controller must perform several task before resuming processing of host I/O requests. Procedures involved with the inventive method may be implemented as one or more computer programs as software and/or firmware stored in a memory of the controller, such as in PROM 178 or other memory and executed by processor 162 in conjunction with RAM memory 164. Desirably, the computer program(s) implementing the inventive procedures is stored in a non-volatile storage memory so that it is retained in memory in the event of the any intended or unintended loss of power to the memory.

#In the event of a controller failure, the surviving controller, for example the primary controller 116 will have a copy of the failed controller's, for example the alternate controller 118, cache line data in the mirror area 176 of the survivor controller's 116 cache memory 120. Once a controller failure is detected by the survivor controller 116, the survivor controller 116 will enter failback mode. During failback mode, the survivor controller 116 will move the failed controller's 118 cache line data from its mirror area 176 into its R/W area 174 in order to flush the backup data to the storage volume 108, 110. This requirement is imposed in order to ensure that the failed controller's 118 cache memory 122 contains no data (dirty data) that has not been synchronized with the storage volume 108, 110. As such, any dirty cache line data of the failed controller 118 must be flushed to the storage volume 108, 110 in order ensure data synchronization between the survivor cache memory 120 and the storage volume 108, 110. In addition, once the dirty cache line data is flushed to the storage volume 108, 110, the survivor cache memory 120 can be re-segmented to included both a R/W area 174 and a mirror area 176 in order to allow cache data mirroring from the failed controller 118. Finally, a host ID is passed back to the failed controller 118 (once re-booted) in order to allow the failed controller 118 to begin accepting host I/O requests.