System and method to place a device in power down modes/states and restore back to first mode/state within user-controlled time window

A method for placing an integrated circuit device having a chip select (CS) input and a clock (CLK) input into a reduced power consumption mode of operation, the method comprising the steps of:

• (a) controlling the CS input of the device to place the CS input into an initial inactive logic state;
• (b) placing the CS input into an active logic state to select the device;
• and
• (c) within a first user-controlled time window defined by transitions of the CLK signal, returning the CS input to the initial inactive logic state.

An analog-to-digital converter comprising:

• means for converting an analog input signal into a corresponding digital signal in response to a control signal;
• means for outputting the corresponding digital signal in serial form in response to a serial clock signal;
• means for generating at least one command signal in response to a user-controlled number of serial clock signal cycles occurring between changing states of the control signal;
• and
• means for applying power to selected portions of the analog-to-digital converter in response to the command signal.