Combined waveform and data entry apparatus and method for facilitating fast behavorial verification of digital hardware designs
AssigneeXilinx, Inc.
InventorsAndrew Maurice Bloom, Rodrigo Jose Escoto
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Abstract
A computer implemented apparatus and method that automates the entry, modification, analysis, and generation of test benches from electrical circuits, both of which are specified as hardware description language (HDL) files. The computer implemented-method and apparatus also provides a unique mechanism that blends entry and display of timing requirements that must be met by the electric circuit.
Claims27
A computer system for constructing HDL test benches based upon HDL descriptions of electrical circuits, comprising:
- means for generating and modifying said HDL data descriptions;
- a computer including a monitor and memory storage means, said memory storage means containing instructions for displaying, on said monitor, a spreadsheet comprised of timing waveforms superimposed on an array of cells containing time-varying signal data patterns, wherein said waveforms and said data patterns correspond to said HDL descriptions and are simultaneously displayed on said monitor;
- means for modifying said waveforms and said signal data patterns;
- and
- means for automatically translating said waveforms into a complete HDL test bench file, said test bench file being fully compatible with industry-standard HDL simulators.
A computer-aided method for constructing HDL test benches based upon HDL descriptions of electrical circuits, comprising the steps of:
- generating and modifying said HDL description;
- providing a computer including a monitor and memory storage means;
- displaying on said monitor, a spreadsheet comprised of timing waveforms superimposed on an array of cells containing time-varying signal data patterns, wherein said waveforms and said data patterns correspond to said HDL descriptions and are simultaneously displayed on said monitor;
- modifying signal waveforms and said data patterns;
- and
- translating, automatically, said waveforms into a complete HDL test bench file, said test bench file being fully compatible with industry-standard HDL simulators.
A computer program stored in a computer-readable medium, said computer program causing said computer to perform a method of constructing HDL test benches based upon HDL descriptions of electrical circuits, said method comprising the steps of:
- generating and modifying said HDL description;
- providing a computer including a monitor;
- displaying on said monitor, a spreadsheet comprised of timing waveforms superimposed on an array of cells containing time-varying signal data patterns, wherein said waveforms and said data patterns correspond to said HDL descriptions and are simultaneously displayed on said monitor;
- modifying signal waveforms and said data patterns;
- and
- translating, automatically, said waveforms into a complete HDL test bench file, said test bench file being fully compatible with industry-standard HDL simulators.
Dependencies are inferred from the claim text.