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AssigneeInternational Business Machines Corporation
InventorsAlain Benayoun, Jean-Francois Le Pennec, Claude Pin, Patrick Michel
Estimating the term…
Hardware device for parallel processing a determined instruction of a set of instructions having a same format defining operand fields and other data fields, the execution of this determined instruction being represented as an algorithm comprising a plurality of processes, the processing of which depending on decisions. Such a device comprises means (22-30) for activating the processing of one or several processes (32-38) determined by the operand fields of the instruction, decision macroblocks (12-20) each being associated with a specific instruction of the set of instructions, only one decision marcoblock being selected by the determined instruction in order to determine which are the process(es) to be activated for executing the determined instruction.
A hardware device for parallel processing a determined instruction of a set of instructions having a same format defining operand fields and other data fields, the execution of each of the set of instructions being represented as an algorithm comprising one or more of a plurality of processes, the processing of which depending on decisions;
Dependencies are inferred from the claim text.