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US 6,675,269 B2Granted
Semiconductor device with memory controller that controls page mode access
AssigneeHitachi, Ltd.
InventorsSeiji Miura, Kazushige Ayukawa
Life of this patent
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Abstract
A memory controller and data processor have their operation mode switched from the page-on mode for high-speed access to a same page to the page-off mode in response to consecutive events of access to different pages, so that the memory access is performed at a high speed and low power consumption.
Claims9
A semiconductor device comprising:
- a memory controller receiving commands from a CPU, and controlling a memory,
- wherein said memory controller has a first mode and a second mode,
- wherein said memory comprises a plurality of word lines, data lines, and memory cells,
- wherein said memory is controlled to precharge after a read access in said first mode,
- wherein said memory is controlled to receive a next access command without a precharge operation after a read access in said second mode,
- wherein said memory controller has a circuit comparing one address inputted and the address previous to said one address to control the mode for access commands corresponding to addresses inputted after said one address,
- wherein after a first number of successive times a different word line is selected, said memory controller changes said second mode to said first mode,
- and wherein said circuit controls sad first number.
5 more elements
A semiconductor device comprising:
- a memory controller receiving commands from a CPU, and controlling a memory,
- wherein said memory controller has a first mode and a second mode,
- wherein said memory comprises a plurality of word lines, data lines, and memory cells,
- wherein said memory is controlled to perform a precharge operation after a read access in said first mode,
- wherein said memory is controlled to receive a next access command without a precharge operation after a read access in said second mode,
- wherein said memory controller has a circuit comparing one address inputted and the address previous to said one address to control the mode for access commands corresponding to addresses inputted after said one address, and
- wherein in said first mode if a same word line is selected successively, said memory controller changes the mode to said second mode for a next access command.
4 more elements
Dependencies are inferred from the claim text.