SCSI data rate speed determination
AssigneeHewlett-Packard Development Company, L.P.
InventorsRobert C. Elliott, William C. Galloway
Life of this patent
Estimating the term…
Abstract
The method of the present invention enables a SCSI repeater to dynamically determine the speed of an input device and adjust the repeater's output speed accordingly. Thus, the SCSI repeater can transparently connect independent SCSI buses that are connected to different devices with different requirements, preventing the slowest device from limiting the speed of the fastest device.
Claims34
A method of adjusting the speed at which a SCSI bus is driven within a bus device, the method comprising the steps of:
- determining a current data rate of a first SCSI bus connected to the bus device;
- determining a standard SCSI data rate corresponding to the current data rate of the first SCSI bus when the current data rate is not equal to the standard SCSI data rate;
- and
- driving a second SCSI bus connected to the bus device at the standard SCSI data rate.
A method of adjusting the speed at which a first SCSI bus is driven within a bus device, the method comprising the steps of:
- providing a clock on the first SCSI bus set at a multiple of the highest frequency of a standard SCSI bus;
- determining a current data rate of the first SCSI bus;
- and
- driving a second SCSI bus at a rate corresponding to a plurality of the clock cycles, wherein the plurality is set to most closely match the second SCSI bus adaptive to the current data rate of the first SCSI bus.
A SCSI repeater circuit, the repeater circuit comprising:
- logic for determining a current data rate of a first SCSI bus connected to the repeater circuit;
- logic for determining a standard SCSI data rate corresponding to the current data rate of the first SCSI bus when the current data rate is not equal to the standard SCSI data rate;
- and
- logic for driving a second SCSI bus connected to the bus device at the standard SCSI data rate.
A SCSI repeater circuit connected to a first SCSI bus, the repeater circuit comprising:
- logic for providing a clock on the first SCSI bus set at a multiple of the highest frequency of a standard SCSI bus;
- logic for determining a current data rate of the first SCSI bus;
- and
- logic for driving a second SCSI bus at a rate corresponding to a plurality of the clock cycles, wherein the plurality is set to most closely match the second SCSI bus adaptive to the current data rate of the first SCSI bus.
A storage system, the storage system comprising:
- a plurality of SCSI mass storage devices in an enclosure;
- and
- a repeater circuit coupled to the SCSI mass storage devices via a first SCSI bus, the repeater circuit comprising:
- logic for determining a current data rate of the first SCSI bus;
- logic for determining a standard SCSI data rate corresponding to the current data rate of the first SCSI bus when the current data rate is not equal to the standard SCSI data rate;
- and
- logic for driving a second SCSI bus connected to the bus device at the standard SCSI data rate.
A storage system, the storage system comprising:
- a plurality of SCSI mass storage devices in an enclosure;
- and
- a repeater circuit coupled to the SCSI mass storage devices via a first SCSI bus, the repeater circuit comprising:
- logic for providing a clock on the first SCSI bus set at a multiple of the highest frequency of a standard SCSI bus;
- logic for determining a current data rate of the first SCSI bus;
- and
- logic for driving a second SCSI bus at a rate corresponding to a plurality of the clock cycles, wherein the plurality is set to most closely match the second SCSI bus adaptive to the current data rate of the first SCSI bus.
A system, the system comprised of:
- a computer;
- and
- a storage system coupled to the computer, the storage system comprising;
- a plurality of SCSI mass storage devices in an enclosure;
- and
- a repeater circuit coupled to the SCSI mass storage devices via a first SCSI bus, the repeater circuit comprising:
- logic for determining a current data rate of the first SCSI bus;
- logic for determining a standard SCSI data rate corresponding to the current data rate of the first SCSI bus when the current data rate is not equal to the standard SCSI data rate;
- and
- logic for driving a second SCSI bus connected to the bus device at the standard SCSI data rate.
A system, the system comprising:
- a computer;
- and
- a storage system coupled to the computer, the storage system comprising;
- a plurality of SCSI mass storage devices in an enclosure;
- and
- a repeater circuit coupled to the SCSI mass storage devices via a first SCSI bus, the repeater circuit comprising:
- logic for providing a clock on the first CSI bus set at a multiple of the highest frequency of a standard SCSI bus;
- logic for determining a current data rate of the first SCSI bus;
- and
- logic for driving a second SCSI bus at a rate corresponding to a plurality of the clock cycles, wherein the plurality is set to most closely match the second SCSI bus adaptive to the current data rate of the first SCSI bus.
Dependencies are inferred from the claim text.