Switching apparatus of time division multiplexing system for controlling data transmission through message memory shared between plural channels, method for data transmission and information storage medium for the method
AssigneeNEC Corporation
InventorsKazuhiko Harasaki, Hideyuki Hirata
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Abstract
A switching apparatus incorporated in a time division multiplying system has a read control memory for storing addresses indicative of parts of different messages to be transferred to different channels, and a read controller checks the read control memory so as to determine the memory areas of a message memory for selectively transferring the parts of different messages to the channels, thereby making the memory structure simple.
Claims13
A switching apparatus for supplying pieces of data information to plural channels defined on a data line through a time division multiplexing, comprising:
- a first memory having first memory areas storing first pieces of data information to be selectively transferred to said plural channels, and responsive to a first address signal for selectively outputting said first pieces of data information;
- a second memory having second memory areas storing second pieces of data information to be selectively transferred to said plural channels, and responsive to a second address signal for selectively outputting said second pieces of data information;
- a selector connected between said first and second memories and said data line, and responsive to a control signal so as to selectively transfer said first pieces of data information and said second pieces of data information to said plural channels;
- a channel controller including
- a third memory having third memory areas associated to said plural channels, respectively, and storing pieces of address information each assigned to one of said first memory areas for storing one of said first pieces of data information to be transferred to associated one of said plural channels or one of said second memory areas for storing one of said second pieces of data information to be transferred to said associated one of said plural channels together with first pieces of flag information each used for controlling the data transfer from said first and second memories to associated one of said plural channels, and
- a controller connected to said first memory, said second memory, said third memory and said selector, and sequentially accessing said third memory areas for controlling said data transfer from said first and second memories through said selector to said data line with said control signal, said first address signal and said second address signal.
A method for transferring pieces of data information to plural channels through a time division multiplexing, comprising the steps of:
- a) storing first pieces of data information, second pieces of data information and plural combinations of pieces of address information and first pieces of flag information in first memory areas of a first memory, second memory areas of a second memory and third memory areas of a third memory, respectively;
- b) deciding a timing to be given for a data transfer to one of said plural channels;
- c) checking one of said third memory areas assigned to said one of said plural channels to see whether the first piece of flag information is indicative of a data transfer from said first memory to said one of said plural channels or from said second memory to said one of said plural channels;
- and
- d) instructing either first memory or second memory to transfer one of said first pieces of data information or one of said second pieces of data information to said one of said plural channels.
An information storage medium for storing a set of programmed instructions representative of a method for transferring pieces of data information to plural channels through a time division multiplexing comprising the steps of
- a) storing first pieces of data information, second pieces of data information and plural combinations of pieces of address information and first pieces of flag information in first memory areas of a first memory, second memory areas of a second memory and third memory areas of a third memory, respectively,
- b) deciding a timing to be given for a data transfer to one of said plural channels,
- c) checking one of said third memory areas assigned to said one of said plural channels to see whether the first piece of flag information is indicative of a data transfer from said first memory to said one of said plural channels or from said second memory to said one of said plural channels and
- d) instructing either first memory or second memory to transfer one of said first pieces of data information or one of said second pieces of data information to said one of said plural channels.
Dependencies are inferred from the claim text.