Methods of reading and/or writing data to memory devices including virtual ground lines and/ or multiple write circuits and related devices

A memory device comprising:

• a plurality of memory cells wherein each memory cell comprises a latch circuit coupled to a read circuit;
• a plurality of virtual ground lines wherein each virtual ground line is coupled with read circuits of a respective plurality of memory cells;
• and
• a controller that selects a memory cell from which data is to be read, applies a first reference voltage to a first virtual ground line coupled to the selected memory cell from which data is to be read, applies a second reference voltage to a second virtual ground line not coupled to the selected memory cell, and activates a read word line coupled to the read circuit of the selected memory cell from which data is to be read, so that data is coupled from the latch circuit of the selected memory cell with a respective read bit line through the read circuit of the selected memory cell responsive to activating the read word line coupled to the read circuit of the selected memory cell.

A memory device comprising:

• a plurality of read word lines;
• a plurality of read bit lines;
• a plurality of virtual ground lines;
• and
• a plurality of memory cells wherein each memory cell comprises a latch circuit that latches a logic value at an output thereof, a read circuit coupled between the output of the latch circuit and a read bit line for the memory cell and a virtual ground line for the memory cell, so that a virtual ground line for the memory cell is coupled to the read bit line responsive to a read signal on the read word line for the memory cell when a first logic value is latched at the latch circuit output, and so that the virtual ground line for the memory cell is blocked from coupling to the read bit line responsive to a read signal on the read word line for the memory cell when a second logic value is latched at the latch circuit output.