High speed analog to digital converter

An analog to digital converter comprising:

• a track-and-hold amplifier tracking an input signal with its output signal during a clock phase φ1 and holding a sampled value during a clock phase φ2;
• a first plurality of amplifiers each inputting a signal corresponding to the output signal and a reference voltage;
• a switching circuit that receives the signal corresponding to the output signal and has a differential mode transfer function of approximately 1 on the clock phase φ2 and approximately 0 on the clock phase φ1;
• a second plurality of amplifiers inputting the reference voltages and the signal corresponding to the output signal through the switching circuit, the reference voltages selected based on outputs of the first plurality of amplifiers;
• and
• an encoder converting outputs of the first and second plurality of amplifiers to an N-bit digital signal representing the input signal.

An analog to digital converter comprising:

• a multi-phase clock;
• a track-and-hold amplifier tracking an input signal with its output signal during one phase of the multi-phase clock and holding a sampled value during another phase of the multi-phase clock;
• a first plurality of amplifiers each inputting a signal corresponding to the output signal and a reference voltage;
• switching means that receives the signal corresponding to the output signal and responsive to the multi-phase clock, the means substantially passing the signal corresponding to the output signal to a second plurality of amplifiers during the one phase and substantially rejecting the signal corresponding to the output signal during the another phase;
• the second plurality of amplifiers inputting, through the switching means, the reference voltages and the output signal, the reference voltages selected based on outputs of the first plurality of amplifiers;
• and
• an encoder converting outputs of the first and second plurality of amplifiers to an N-bit digital signal representing the input signal.

An analog to digital converter comprising:

• a plurality of amplifiers each sampling an input signal at an end of a clock phase φ1 and each inputting a voltage reference at an end of a clock phase φ2;
• a plurality of fine amplifiers inputting reference voltages and a signal corresponding to the sampled input signal;
• a circuit responsive to the clock that receives the signal corresponding to the output signal, the circuit substantially passing the signal corresponding to the output signal and the reference voltages to the amplifiers during the clock phase φ2 and substantially rejecting the signal corresponding to the output signal during the clock phase φ2;
• and
• an encoder converting outputs of the amplifiers to an N-bit digital signal representing the input signal.