US 6,674,317 B1 · Output stage of a charge pump circuit providing relatively stable output voltage without voltage degradation

Abstract

An output stage and method for a charge pump circuit which substantially reduces the degradation of the output voltage. A first NMOS transistor has its source connected to an input node and its drain connected to a second node. A second NMOS transistor has its source connected to the input node, its gate connected to the drain of the first NMOS transistor, and its drain connected to the gate of the first NMOS transistor. A capacitor is connected between a second clock signal and the drain of the second NMOS transistor. Another capacitor is connected between a first clock signal and an intermediate node. The key part of the invention is a diode pair connected anode of one to the cathode of the other and inserted between the intermediate node and the drain of the first NMOS transistor. This has the effect of changing a parallel combination of capacitors to a series combination of capacitors, thereby reducing the degradation of the output voltage and providing a stable voltage to the gate of an NMOS transistor switch in the output of the circuit.

Claims31

Dependent claims

A charge pump output stage, comprising:

an input node, a second node, a first clock node, and a second clock node;
a first transistor, wherein said first transistor is an N channel metal oxide semiconductor field effect transistor having a source connected to said input node, a gate, and a drain connected to said second node;
a second transistor, wherein said second transistor is an N channel metal oxide semiconductor field effect transistor having a source connected to said input node, a gate connected to said drain of said first transistor, and a drain connected to said gate of said first transistor;
a first diode having an anode and a cathode wherein said cathode of said first diode is connected to said drain of said first transistor;
a second diode having an anode and a cathode wherein said anode of said second diode is connected to said drain of said first transistor and said cathode of said second diode is connected to said anode of said first diode;
a first capacitor connected between said first clock node and said anode of said first diode;
and
a second capacitor connected between said second clock node and said drain of said second transistor.

5 more elements

A voltage multiplier circuit, comprising:

a multistage charge pump circuit having a first output node;
a first node connected to said first output node;
a second node, a first clock node, and a second clock node;
a first transistor, wherein said first transistor is an N channel metal oxide semiconductor field effect transistor having a source connected to said first node, a gate, and a drain connected to said second node;
a second transistor, wherein said second transistor is an N channel metal oxide semiconductor field effect transistor having a source connected to said first node, a gate connected to said drain of said first transistor, and a drain connected to said gate of said first transistor;
a first diode having an anode and a cathode wherein said cathode of said first diode is connected to said drain of said first transistor;
a second diode having an anode and a cathode wherein said anode of said second diode is connected to said drain of said first transistor and said cathode of said second diode is connected to said anode of said first diode;
a first capacitor connected between said first clock node and said anode of said first diode;
and
a second capacitor connected between said second clock node and said drain of said second transistor.

7 more elements

A method of providing a stable output voltage for a voltage multiplier circuit, comprising:

providing a multistage charge pump circuit having a first output node;
providing a first node connected to said first output node;
providing a second node, a first clock node, and a second clock node;
providing a first transistor, wherein said first transistor is an N channel metal oxide semiconductor field effect transistor having a source connected to said first node, a gate, and a drain connected to said second node;
providing a second transistor, wherein said second transistor is an N channel metal oxide semiconductor field effect transistor having a source connected to said first node, a gate connected to said drain of said first transistor, and a drain connected to said gate of said first transistor;
providing a first diode having an anode and a cathode;
providing a second diode having an anode and a cathode;
connecting said cathode of said first diode to said drain of said first transistor;
connecting said anode of said second diode to said drain of said first transistor and said cathode of said second diode to said anode of said first diode;
connecting a first capacitor between said first clock node and said anode of said first diode;
and
connecting a second capacitor between said second clock node and said drain of said second transistor.

9 more elements

Dependencies are inferred from the claim text.

Output stage of a charge pump circuit providing relatively stable output voltage without voltage degradation

Life of this patent

Output stage of a charge pump circuit providing relatively stable output voltage without voltage degradation

Life of this patent

Abstract

Claims31