Electronic device having a CMOS circuit

Abstract

A depletion type n-channel MOS transistor (hereinafter referred to as “D-type NMOS”) as a MOS transistor of a SOI structure is disposed between a plus side power supply terminal of a CMOS circuit and a plus side terminal of a power supply unit so as to connect a source thereof to the pulse side power supply terminal of the CMOS circuit, to connect a drain thereof to the plus side terminal of the power supply unit, and to input to a gate thereof a voltage such that even if the voltage of the plus side terminal of the power supply unit exceeds the upper limit of the operation voltage of the CMOS circuit, the source of the D-type NMOS is equal to or lower than the upper limit of the operation voltage of the CMOS circuit, and the same voltage as the voltage of the plus side terminal of the power supply means when the voltage of the plus side terminal of the power supply means is the vicinity of the lower limit of the operation voltage of the CMOS circuit.

Dependencies are inferred from the claim text.