Differential time sampling circuit
AssigneeAnalog Devices, Inc.
InventorsDouglas A. Mercer, Michael P. Timko
Life of this patent
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Abstract
A method and apparatus for measuring and controlling the phase difference or time difference between two signals is presented. In some embodiments two sample and hold (S/H) circuits are arranged as a cooperating system that alternately samples a first signal using the second as a reference. Chopping may be used at the input or output of the S/H circuits. In some embodiments, accurate measurement of digital signal phase differences, such as between two square waves, is obtained without the problems associated with traditional pulse-generation techniques that fail at high frequencies and short pulse lengths.
Claims22
A differential sampling circuit, comprising:
- a commutator having at least two inputs that receive a respective first input signal and a second input signal, said commutator having at least a first output and a second output, the first commutator output alternately providing said first and second input signals and the second commutator output alternately providing said second and first input signals, respectively;
- a sample-and-hold circuit that alternately samples the second commutator output using the first commutator output as a reference, and samples the first commutator output using the second commutator output as a reference, and that provides an interleaved error signal;
- and
- a decommutator that receives said interleaved error signal and provides at least two de-interleaved output signals indicative of a time difference between said first and second input signals;
- wherein the commutator and the decommutator are complimentary and perform substantially inverse operations.
A method for determining a time difference between at least a first input signal and a second input signal, comprising:
- commutating the first and second input signals to alternately provide the first and second input signals at first and second commutator outputs;
- alternately sampling the first commutator output using the second commutator output as a reference and sampling the second commutator output using the first commutator output as a reference;
- generating an interleaved error signal from the first and second commutator outputs;
- and
- de-interleaving said error signal to provide at least two de-interleaved output signals indicative of a time difference between the first and second input signals.
A differential sampling circuit, comprising:
- an input network, said input network comprising a first input line and a second input line, each of said first and second input lines being cross-hard wired to provide a pair of respective first and second input signals;
- a first sampling circuit and a second sampling circuit, each of said first and second sampling circuits receiving said pair of first and second input signals from the cross-hard wired input lines, said first and second sampling circuits each providing an output voltage;
- and
- an error signal, corresponding to a phase difference between said first and second input signals, said error signal representing a potential difference between said first and second sampling circuit outputs.
Dependencies are inferred from the claim text.