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US 6,674,300 B2Granted
Method for testing a semiconductor integrated circuit when a difference between two consecutive current exceeds a threshold value
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsChizuru Inoshita, Kazuo Aoki
Life of this patent
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Abstract
In a method of testing a semiconductor integrated circuit, setting of a logical state of elements that constitute a semiconductor integrated circuit to be measured is sequentially changed. The current from a static-time power source current passing through the elements is measured several times while the settings are changed. Any two consecutive currents are obtained. When the difference between the two consecutive current exceeds a threshold value it is determined that the semiconductor integrated circuit is defective.
Claims3
A method of testing a semiconductor integrated circuit comprising:
- supplying an input signal to a logic circuit of a semiconductor integrated circuit, the input signal changing logical state of a plurality of elements of the semiconductor integrated circuit;
- repeatedly measuring current from a static-time power source and passing through the plurality of elements while changing and setting the logical state of the plurality of elements;
- with respect to the currents that have been measured a plurality of times, calculating, for any two consecutively measured currents, a difference;
- and
- determining that the semiconductor integrated circuit is defective when the difference exceeds a first threshold value.
2 more elements
Dependencies are inferred from the claim text.