Semiconductor device utilizing pad to pad wire interconnection for improving detection of failed region on the device

A semiconductor device comprising:

• a semiconductor substrate;
• an inner active region including a first electronic circuit formed on the semiconductor substrate;
• a plurality of outer active regions which are located at symmetrical positions in relation to said inner active region and positioned between the edge of said semiconductor substrate and said inner active region and including a second electronic circuit formed on said semiconductor substrate;
• a plurality of main bonding pads which are connected with said inner active region through a protection circuit to eliminate a surge from outside and formed inside an opposing region where said inner active region is opposed to said outer active regions and along the outer periphery of said inner active region;
• a sub-bonding pad which is smaller than said main bonding pads and formed outside the region where said inner active region is opposed to said outer active regions;
• and
• a pad-to-pad interconnection wiring for electrically connecting any one of said main bonding pads to said sub- bonding pad.

A semiconductor device comprising:

• a semiconductor substrate;
• an inner active region including a first electronic circuit formed on the semiconductor substrate;
• a plurality of outer active regions which are located at symmetrical positions in relation to said inner active region and positioned between the edge of said semiconductor substrate and said inner active region and including a second electronic circuit formed on said semiconductor substrate;
• a main bonding pad which is connected with said inner active region through a protection circuit to eliminate a surge from outside and formed inside an opposing region where said inner active region is opposed to said outer active regions and along the outer periphery of said inner active region;
• a circuit-to-circuit interconnection wiring for connecting said first electronic circuit to said second electronic circuit;
• and
• a scan register provided in the circuit-to-circuit interconnection wiring.