SiGeC-based CMOSFET with separate heterojunctions
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsMinoru Kubo, Katsuya Nozawa, Masakatsu Suzuki, Takeshi Uenoyama, Yasuhito Kumabuchi
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AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsMinoru Kubo, Katsuya Nozawa, Masakatsu Suzuki, Takeshi Uenoyama, Yasuhito Kumabuchi
Estimating the term…
Si and SiGeC layers are formed in an NMOS transistor on a Si substrate. A carrier accumulation layer is formed with the use of a discontinuous portion of a conduction band present at the heterointerface between the SiGeC and Si layers. Electrons travel in this carrier accumulation layer serving as a channel. In the SiGeC layer, the electron mobility is greater than in silicon, thus increasing the NMOS transistor in operational speed. In a PMOS transistor, a channel in which positive holes travel, is formed with the use of a discontinuous portion of a valence band at the interface between the SiGe and Si layers. In the SiGe layer, too, the positive hole mobility is greater than in the Si layer, thus increasing the PMOS transistor in operational speed. There can be provided a semiconductor device having field-effect transistors having channels lessened in crystal defect.
A semiconductor device comprising a field-effect transistor which is formed on a portion of a semiconductor substrate and which comprises a gate electrode, source-drain regions and a channel region between said source-drain regions,
Dependencies are inferred from the claim text.