Method of forming a pattern using a photoresist without exposing the photoresist and silicidation method incorporating the same

A silicidation method in the manufacturing of a semiconductor device, comprising the steps of:

• providing a substrate having a memory portion and a peripheral circuit and logic portion at the periphery of the memory portion, each of the memory portion and the peripheral circuit and logic portion comprising a gate pattern;
• forming a target layer on the gate patterns of the peripheral circuit and logic portion and the memory portion of the substrate such that the target layer conforms to the gate patterns;
• forming a photoresist layer on the target layer at both the memory portion and peripheral circuit and logic portion of the substrate, whereby the photoresist layer has an upper surface situated above the target layer, and wherein the photoresist layer is of at least one composition selected from the group consisting of a first photoresist composition comprising a first novolak resin and a photoactive compound of 3-15 wt % based on the total weight of the first novolak resin, a second photoresist composition comprising a first novolak resin, a second novolak resin of 10-60 wt % based on the total weight of the first novolak resin and having a rate of dissolution in a developing solution of 300-1500 Å/sec, and a photoactive compound of 15-30 wt % based on the total weight of the first novolak resin, and a third photoresist composition comprising a first novolak resin, polyhydroxystyrene of 10-60 wt % based on the total weight of the first novolak resin, and a photoactive compound of 15-30 wt % based on the total weight of the first novolak resin;
• with respect to the photoresist layer formed at the memory portion and peripheral circuit and logic portion of the substrate, exposing only at least some of the photoresist layer that is located at the peripheral circuit and logic portion;
• dissolving a portion of the photoresist layer over a first area at the memory portion of the substrate and dissolving all of the photoresist layer that has been exposed at the peripheral circuit and logic region, by soaking the photoresist layer in a developing solution until the upper surface thereof at the memory portion is situated below the upper surface of the gate pattern of the memory portion, and thereby leaving a portion of the photoresist layer undissolved over the entire said first area, whereby a photoresist pattern is formed that exposes part of the target layer at the memory portion of the substrate and that exposes at least part of the target layer on both the gate pattern and an active area of the peripheral circuit and logic portion of the substrate;
• removing the exposed parts of the target layer at both the memory portion and peripheral circuit and logic portion of the substrate;
• subsequently removing the photoresist pattern;
• and
• subsequently forming a suicide layer on the upper portion of the gate pattern of the memory portion, and in said active area and on the upper portion of the gate pattern of the peripheral circuit and logic portion.