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US 6,673,648 B2Granted
Isolating phase change material memory cells
AssigneeIntel Corporation
InventorTyler Lowrey
Life of this patent
Estimating the term…
Abstract
A phase change memory may have reduced reverse bias current by providing a N-channel field effect transistor coupled between a bipolar transistor and a conductive line such a row line. By coupling the gate of the MOS transistor to the row line, reverse bias current in unselected cells or in the standby mode may be reduced.
Claims12
A method comprising:
- forming an array of row and column lines;
- coupling a phase change memory element to a row or column line;
- coupling the phase change memory element to a bipolar transistor;
- and
- coupling said bipolar transistor to a field effect transistor.
2 more elements
Dependencies are inferred from the claim text.