Method and apparatus for transversely staged combustion utilizing forced internal recirculation
AssigneeGas Technology Institute
InventorsIosif K. Rabovitser, Richard A. Knight, David F. Cygan
Life of this patent
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Abstract
An apparatus for combustion of a fuel in stages having at least one wall enclosing a chamber and forming at least one fuel inlet opening, at least one oxidant inlet opening and a plurality of fuel/oxidant outlet openings. A recirculation sleeve is disposed on the fuel/oxidant outlet side of the chamber and is coaxially aligned with the center axis of the apparatus. A plurality of fuel distributors are disposed within the chamber, each fuel distributor having a fuel inlet and a plurality of fuel outlets, each of the fuel outlets being aligned with a corresponding one of the fuel/oxidant outlet openings. Also disclosed is a method for combustion of a fuel in stages.
Claims55
An imaging dcvicc formed as an integrated circuit comprising:
- a photosensitive device far accumulating photo-generated charge having a generally diagonally shaped component contacting a column output line in an underlying portion of a semiconductor substrate;
- and
- a readout circuit comprising at least an output transistor;
- wherein said imaging device is in a row of similar imaging devices in an array and shares said column output line with an adjacent imaging device of the row.
A method for generating an outpnt signal corresponding to an image focused on a sensor array having rows and columns of pixel sensors on a substrate wherein two adjacent pixel sensors in a row are connected to a shared column line, each sensor capable of collecting electrical charge based on a detected light intensity, the method comprising the steps of:
- activating a first sensor in a row connected to a shared column line for a first period of time then subsequently activating an adjacent second sensor in the row connected to said shared column line for a second period of time;
- detecting a first voltage at a node of a respective activated sensor;
- resetting the voltage of the respective nodes of said activated sensors to a predetermined voltage, wherein said voltage is reset by a reset transistor addressed by a reset line which is linear in said substrate;
- transferring electrical charges collected by said activated sensor to said node;
- generating an output signal over said shared column line.
An imaging system comprising:
- a plurality of pixel cells having an active sensor area which includes a diagonally shaped component, the cells being arranged into an array of rows and columns, each pixel cell being operable to generate a voltage at a diffusion node corresponding to detected light intensity by the sensor, wherein two cells in a row share a common column line for addressing said pixel cell and the pixel cells in the row that share the common column line are alternatively addressed by respective row select lines;
- a row select device connected to either an odd row select line or an even row select line respectively;
- and
- a row decoder having a plurality of control lines connected to the pixel cells, each control line being connected to the cells in contact with a respective column, wherein the row decoder is operable to activate odd cells in said rows and even cells in said rows by said row select device.
A CMOS imager array comprising:
- a plurality of CMOS imager pixels for generating an output signal from detected light and arranged in rows and columns in an array;
- a plurality of column lines each connected to at least two adjacent pixels of a row in said array, said column lines being connected to output circuitry to output signals generated from detected light;
- a plurality of odd row select lines orthogonal to said column lines to address odd pixels in said rows;
- a plurality of even row select lines orthogonal to said column lines to address even pixels in said rows;
- column drivers to address the pixels connected to said column lines;
- row drivers to address he pixels through said odd row lines and said even row lines.
A system comprising:
- (i) a processor;
- and
- (ii) a CMOS imaging device coupled to said processor and including:
- a photosensitive device for accumulating photo-generated charge in an underlying portion of a semiconductor substrate, wherein the photosensitive area of said imaging devices sharing a column line is generally S-shaped;
- and
- a readout circuit comprising at least an output transistor;
- wherein said imaging device is in a row of similar imaging devices in an array and shares a column output line with an adjacent imaging device of the row.
Dependencies are inferred from the claim text.